Designing a SHA-256 processor for blockchain-based IoT applications

Martino, Raffaele; Cilardo, Alessandro

doi:10.1016/j.iot.2020.100254

Cited by 37 publications

(26 citation statements)

References 10 publications

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“…nonce is the only field of the header that will be changed. This means that the miner may need to compute SHA 2 and SHA 3 up to 2 32 times for each calculation of SHA-256 1 . Therefore, our aim is to develop a hardware circuit to accelerate SHA 2 and SHA 3 with the assumption that SHA 1 has been computed by the microprocessor of the embedded system.…”

Section: A Proof Of Work Consensus and Double Sha-256mentioning

confidence: 99%

“…Finally, the CPU forms a new block based on the valid hash found by the BCA and broadcasts the new block to the BC network. 32 values of nonce to find a valid hash value smaller than the target value. Then, the BCA is programmed to have nonce_step A = 2 26 , in which "D-PE 0", "D-PE i ", and "D-PE 63" compute for nonce ranging from 0 to A, (i × A) to ((i + 1) × A − 1), and (63 × A) to (64 × A − 1), respectively.…”

Section: Proposed Blockchain Accelerator (Bca)mentioning

confidence: 99%

“…3) NAU and VHC: The baseline design in [28] computes single SHA-256 functions independently. The computation of 2 32 values of double SHA-256 corresponding to 2 32 values of nonce requires transferring an amount of 384 × 2 32 bytes of data. The data transfer time occupies a large time portion of the total processing time, which may limit the total processing time because the bottleneck issue on the maximum data transfer rate can be provided by the embedded board.…”

Section: B Evaluating the Impact Of The Proposed Techniques Inside The Bcamentioning

confidence: 99%

“…We ran the baseline design in [28] on Xilinx FPGA ZCU-102 and the proposed BCA on Xilinx Alveo U280 to compute 2 32 values of double SHA-256. We were not able to run both accelerators on the same hardware platform for a fair evaluation for the following reasons.…”

Section: B Evaluating the Impact Of The Proposed Techniques Inside The Bcamentioning

confidence: 99%

See 3 more Smart Citations

BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks

Tran

Pham

Phan

et al. 2021

IEEE Trans. Circuits Syst. I

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Blockchain distributed ledger technology (DLT)has widespread applications in society 5.0 because it improves service efficiency and significantly reduces labor costs. However, employing blockchain DLT entails considerable energy consumption in the mining process. This paper proposes a blockchain accelerator (BCA) with ultralow power consumption and a high processing rate to address the problem. The BCA focuses on accelerating the double secure hash algorithm (SHA) 256 function required in the mining process at a system-onchip (SoC) level. We propose three ideas, namely, multiple local memories (multimem), double-cell processing element (D-PE), and nonce autoupdate (NAU), to reduce the external data transfer time and improve the BCA hardware efficiency. We propose a cascaded multiple BCA chip model to enhance the system throughput by several-fold. Our experiments on an ASIC and FPGA prove that the proposed BCA successfully performs the mining process for multiple blockchain networks with much lower power consumption than that of the state-of-the-art CPUs and GPUs. The BCA is laid out with Renesas 65 nm technology with a chip area of 25 mm 2 and consumes 530 mW at 100 MHz. The power efficiency of the layout chip is improved by 2428 and 143 times compared with that of the fastest CPU Intel i9-10940X and GPU RTX 3090, respectively.

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Section: A Proof Of Work Consensus and Double Sha-256mentioning

confidence: 99%

Section: Proposed Blockchain Accelerator (Bca)mentioning

confidence: 99%

Section: B Evaluating the Impact Of The Proposed Techniques Inside The Bcamentioning

confidence: 99%

Section: B Evaluating the Impact Of The Proposed Techniques Inside The Bcamentioning

confidence: 99%

See 2 more Smart Citations

BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks

Tran

Pham

Phan

et al. 2021

IEEE Trans. Circuits Syst. I

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“…SHA-2 is a family of 4 standardized hash algorithms: SHA-224, SHA-384, SHA-256, and SHA-512. SHA-2 is crucial and advantageously used in a wide range of emerging applications such as cloud computing [2], security of reconfigurable computing platforms [3], blockchains [4][5][6], big data [7] and internet of things (IoTs) [1] [8] [9]. Therefore, several works focused on improving the performance (e.g., hashing speed, and power consumption) of SHA-2 on targeted devices such as graphics processing units (GPUs) [10] or field-programmable gate arrays (FPGAs) [11].…”

Section: Introductionmentioning

confidence: 99%

Acceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL

Bensalem

Blaquiere

Savaria

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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The Secure Hash Algorithm-256 (SHA-256) is a cryptographic function used in a wide variety of applications ranging from Internet of Things micro-devices to highperformance systems. This paper studies a set of implementations of the SHA-256 on a field-programmable gate array (FPGA) elaborated using the Open Computing Language (OpenCL). These implementations apply several optimization techniques to improve their respective throughputs. Reported results show that a combination of OpenCL optimization techniques allows obtaining an implementation offering a 90x speed-up when compared to an unoptimized OpenCL implementation. Moreover, the best reported optimized implementation achieves a throughput of 3973 Mbps, which is 4.3 times higher than the best previously published HLS-based SHA-256 implementation and even higher than the previously published implementations using a hardware description language. To our knowledge, this work is the first that proposes an OpenCL-based FPGA implementation of SHA-256 and its OpenCL-based optimization methodology.

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Blockchain in Data Security and Transparency in Business Transactions

Verma,

Dhanda

2024

Decentralized Systems and Distributed Computing

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Designing a SHA-256 processor for blockchain-based IoT applications

Cited by 37 publications

References 10 publications

BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks

BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks

Acceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL

Blockchain in Data Security and Transparency in Business Transactions

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