Designing a custom architecture for DCT using NISC technology

Gorjiara,; Reshadi,; Gajski,

doi:10.1109/aspdac.2006.1594664

Cited by 4 publications

(1 citation statement)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The exposed datapath concept has recently been used in the No Instruction Set Computer (NISC) [2,7,14] project, where the control pipeline is removed and the controller emits a wide instruction word each cycle. Co-design refinement of hardware and software is used to reach the desired performance.…”

Section: Related Workmentioning

confidence: 99%

FlexCore: Utilizing Exposed Datapath Control for Efficient Computing

Thuresson

Själander

Björk

et al. 2008

J Sign Process Syst Sign Image Video Technol

View full text Add to dashboard Cite

We introduce FlexCore, the first exemplar of an architecture based on the FlexSoC framework. Comprising the same datapath units found in a conventional five-stage pipeline, the FlexCore has an exposed datapath control and a flexible interconnect to allow the datapath to be dynamically reconfigured as a consequence of code generation. Additionally, the FlexCore allows specialized datapath units to be inserted and utilized within the same architecture and compilation framework. This study shows that, in comparison to a conventional five-stage general-purpose processor, the FlexCore is up to 40% more efficient in terms of cycle count on a set of benchmarks from the embedded application domain. We show that both the finegrained control and the flexible interconnect contribute to the speedup. Furthermore, according to our VLSI implementation study, the FlexCore architecture offers both time and energy savings. The exposed FlexCore datapath requires a wide control word. The conducted evaluation confirms that this increases the instruction bandwidth and memory footprint. This calls for efficient instruction decoding as proposed in the FlexSoC framework.

show abstract

Section: Related Workmentioning

confidence: 99%