Designing a Crossbar Scheduler for HPC Applications

Minkenberg, Cyriel; Audigier, François; Müller, Peter; Krishnamurthy, R.; Gusat, Mitch; Dill, Peter; Iliadis, Ilias; Luijten, Ronald P.; Hemenway, Roe; Grzybowski, Richard; Schiattarella, E.

doi:10.1109/mm.2006.51

Cited by 44 publications

(14 citation statements)

References 12 publications

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“…Among all the proposed optical switching architectures in literature, the optical shared memory supercomputer interconnect system (OSMOSIS) [3], [4], data vortex [5], and low-latency interconnect optical network switch (LIONS, previously named as DOS) [6] are three pioneering architectures that have attracted a fair amount of attention. The simulation comparison in [6] shows that LIONS provides lowlatency and high-throughput switching and does not saturate even at very high (∼90%) input load.…”

Section: Lions: An Awgr-based Low-latency Optical Switch For High-permentioning

confidence: 99%

LIONS: An AWGR-Based Low-Latency Optical Switch for High-Performance Computing and Data Centers

Yin

Proietti

et al. 2013

IEEE J. Select. Topics Quantum Electron.

132

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This paper discusses the architecture of an arrayed waveguide grating router (AWGR)-based low-latency interconnect optical network switch called LIONS, and its different loopback buffering schemes. A proof of concept is demonstrated with a 4 × 4 experimental testbed. A simulator was developed to model the LIONS architecture and was validated by comparing experimentally obtained statistics such as average end-to-end latency with the results produced by the simulator. Considering the complexity and cost in implementing loopback buffers in LIONS, we propose an all-optical negative acknowledgement (AO-NACK) architecture in order to remove the need for loopback buffers. Simulation results for LIONS with AO-NACK architecture and distributed loopback buffer architecture are compared with the performance of the flattened butterfly electrical switching network.

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Section: Lions: An Awgr-based Low-latency Optical Switch For High-permentioning

confidence: 99%

LIONS: An AWGR-Based Low-Latency Optical Switch for High-Performance Computing and Data Centers

Yin

Proietti

et al. 2013

IEEE J. Select. Topics Quantum Electron.

132

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“…Our time slot target is 51.2ns (256-byte cells at a line rate of 40 Gb/s [4] [5]). Known optimum multicast matching algorithms, e.g.…”

Section: Schedulermentioning

confidence: 99%

“…The motivation for this synthesis is the implementation of a crossbar scheduler for a 64-port optical switch demonstrator (called OSMOSIS) with 40-Gb/s ports and a predefined scheduling cycle (time slot) of 51.2 ns for high performance computing applications [2][4] [5]. A major challenge in this project is to implement a 64-port scheduler with this time slot duration in FPGAs, which were used for minimizing cost and improving the flexibility of the design.…”

Section: A Fpga Synthesismentioning

confidence: 99%

Split-iterative and sequential multicast scheduling for IQ switches

Shoaib

2007

2007 6th International Conference on Information, Communications &Amp; Signal Processing

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The objective of this work is to design and implement controlled (Weighted Round Robin Matching, WRRM) and sequential iterative schemes for weight based multicast traffic scheduling in input-queued (IQ) switches. Motivated by the practical synthesis of a scheduler for a 64-port optical crossbar switch, we demonstrate that limited and sequential iterations in the Weight Based Arbiter (WBA) lead to adjustable clock speeds and configurable designs with flexible control in the performance characteristics close to the conventional WBA. Our FPGA sizing experiments and clock speed evaluations show improvements of upto 46.48% and 19.12%, respectively, over the WBA. In addition, latency-throughput results for the proposed variations, highlight the trade-offs between fairness, throughput, hardware complexity and speed.

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“…Another remarkable example is the OSMOSIS project [13]. A 64-port switch combining eight wavelengths on eight fibres has been demonstrated, implementing a synchronous broadcast-andselect architecture based on SOAs with a pipelined centralised scheduler [14]. Moreover, a speculative approach for the scheduler has been devised, to reduce the control path latency by sending packets even without explicit grants under specific conditions, and allowing for retransmission of colliding packets [15].…”

Section: Introductionmentioning

confidence: 99%

Power and scalability analysis of multi-plane optical interconnection networks

et al. 2012

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The scalability of current electrical interconnection networks will be soon limited by their power consumption and dissipation. To overcome such an issue, multi-plane optical interconnection networks have been proposed. Multi-plane networks are composed of a number of cards, each of them supporting a number of ports, interconnected through a passive optical backplane. Two switching domains are envisioned to be exploited allowing for flexible switching of data packets across all ports and cards. This study considers three different implementations that are representative of the multi-plane optical interconnection networks based on space and wavelength switching. The implementations differ from each other in the switching domain used. The aim of the work is to investigate the power consumption and scalability of the three implementations, based on state-of-the-art 40 Gb/s technology. The physical layer analysis and the power consumption assessment including both electronic and optical components indicate that the implementation can impact on the scalability as well as the power consumption. The arrayed waveguide gratings (AWG)-based implementation is found to suffer from scalability and power consumption issues. On the other hand, an implementation based on active switches shows an energy efficiency similar to the coupler-based implementation, but a four-fold scalability increase

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Designing a Crossbar Scheduler for HPC Applications

Cited by 44 publications

References 12 publications

LIONS: An AWGR-Based Low-Latency Optical Switch for High-Performance Computing and Data Centers

LIONS: An AWGR-Based Low-Latency Optical Switch for High-Performance Computing and Data Centers

Split-iterative and sequential multicast scheduling for IQ switches

Power and scalability analysis of multi-plane optical interconnection networks

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