Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters

Chien, Yu-Tsun; Chen, Dong; Lou, J.; Ma, Gin-Kou; Rutenbar, Rob A.; Mukherjee, Tamal

doi:10.1109/date.2005.119

Cited by 9 publications

(1 citation statement)

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“…Modern computational power enables the use of high accuracy SPICE simulation for flat optimization of small designs or sub-blocks (Palmers 2009). For simulation at the system level particularly for large designs, behavioral or other abstract modeling of the sub-blocks may be used to improve simulation speed (Eeckelaert 2006;Yu-Tsun 2005). The use however of behavioral modeling at the system level presents a drawback that prevents widespread adoption of analogue synthesis system methodologies.…”

Section: Introductionmentioning

confidence: 99%

Hierarchical synthesis system with hybrid DLO‐MOGA optimization

Scanlan

Halton

2011

COMPEL - The International Journal for Computation and Mathematics in Electrical and Electronic Engineering

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ABSTRACT:Purpose-The purpose of this paper is to present a hierarchical circuit synthesis system with a Hybrid DLO-MOGA (Deterministic Local Optimization -Multi-Objective Genetic Algorithm) optimization scheme for system level synthesis.Design/methodology/approach-The use of a local optimization with a deterministic algorithm based on linear equations which is computationally efficient and improves the feasibility of designs, allows reduction in the number of MOGA generations required to achieve convergence. Originality/value-The use of a Hybrid DLO-MOGA optimization approach is a new approach to improve hierarchical circuit synthesis time while preserving accuracy. Paper Type-Research Paper

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Section: Introductionmentioning

confidence: 99%