Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies

Gielen, Georges

doi:10.1109/aspdac.2007.358024

Cited by 12 publications

(4 citation statements)

References 38 publications

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“…Analog circuits form an important part in integrated circuits and in particular in ASICs (Application Specific Integrated Circuits). However, due to the high complexity, design of this part has become a bottle-neck in the design flow (Gielen, 2007;. To overcome this problem and to guaranty that the analog part can be designed in reasonable time even for future technologies, methods supporting automatic design of analog circuits must be advanced.…”

Section: Yuping Wumentioning

confidence: 99%

Advances in Analog Circuits

Tlelo-Cuautle¹

2011

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Esteban Tlelo-Cuautle received a B.Sc. degree from Instituto Tecnológico de Puebla in 1993. He then received both M.Sc. and Ph.D. degrees from Instituto Nacional de Astrofísica, Óptica y Electrónica (INAOE), in 1995 and 2000, respectively. In 2001 he was appointed as professor-researcher at INAOE. From 2009-2010, he served as a Visiting Researcher in the department of electrical engineering at the University of California Riverside, USA. He has authored four books, ten book chapters, 46 journal articles and around 100 conference papers. He is an IEEE Senior Member, IEICE Member, and a member of the National System for Researchers (SNI-México). He serves in the editorial board of Nonlinear Science Letters B: Chaos, Fractal and Synchronization; Trends in Applied Sciences Research; and Journal of Applied Sciences. He regularly serves as a reviewer in about 22 journals and 15 international conferences.His research interests include systematic synthesis and behavioral modeling and simulation of linear and nonlinear circuits and systems, chaotic oscillators, symbolic analysis, multi-objective evolutionary algorithms, and analog/ RF and mixed-signal design automation tools.

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Section: Yuping Wumentioning

confidence: 99%

Advances in Analog Circuits

Tlelo-Cuautle¹

2011

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“…Analog blocks acquire and produce the continuous-valued signals that exist in the world, leading to complex systems-on-a-chip (SoC) where digital and analog circuits are integrated together on the same die [1]. Unlike digital circuits, where the low-level phases of the design process are automated using fairly standard methodologies, the synthesis and layout of analog circuits is either a manual task or uses some kind of custom automation solutions.…”

Section: Introductionmentioning

confidence: 99%

“…The automation of analog circuit sizing is commonly achieved using optimization-based techniques that may or may not use a circuit simulator to evaluate the performance of the tentative solutions during the synthesis process [1]. Some commercially available solutions, like the circuit optimizer feature of Cadence's Virtuoso Custom Design Platform GXL [3], Synopsys Titan ADX [4] or MunEDA-GNO [5] already implement such an optimization-based approach.…”

Section: Introductionmentioning

confidence: 99%

Floorplan-aware analog IC sizing and optimization based on topological constraints

et al. 2015

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“…The evolution of complex analog systems towards nanometer-scale CMOS processes along with the increasing development of systems-on-a-chip (SoCs) and systems-in-apackage (SiPs) including mixed analog and digital circuitry imposes the existence of efficient analog design methodologies which can balance the high-performance digital implementation and verification techniques. Top-down design paradigms are preferred in order to handle together the digital and the analog parts and to ensure performance optimization directly at system level [1].…”

Section: Introductionmentioning

confidence: 99%

A high-level modeling framework for the design and optimization of complex CT functions

Bénabès

Tugui

2011

2011 IEEE 9th International New Circuits and Systems Conference

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Novel CMOS technologies are rapidly migrating towards the nanometer world. The design and optimization of complex analog circuits implying these processes is impracticable when using only transistor-level electronic design automation (EDA) tools. Efficient design methodologies including behavioral modeling are inevitable, but the high-level models should incorporate accurate circuit characteristics and technological limitations. One solution consists in using a refined top-down design process where the macro-models are extracted from the analog block elements (e.g. amplifiers, filters) implemented on specific technologies. These fast-simulating models can be used for the high-level simulation and optimization of the entire system. We propose in this paper a complete design methodology implying the above elements and the corresponding application framework based on the interface between MATLAB and CADENCE software tools. SIMULINK and VHDL-AMS are used for the high-level system modeling. A continuous-time (CT) Sigma-Delta modulator application is presented.

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Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies

Cited by 12 publications

References 38 publications

Advances in Analog Circuits

Advances in Analog Circuits

Floorplan-aware analog IC sizing and optimization based on topological constraints

A high-level modeling framework for the design and optimization of complex CT functions

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