Design Space Exploration for Efficient Resource Utilization in Coarse-Grained Reconfigurable Architecture

Kim, Yoonjin; Mahapatra, Rabi; Choi, Ki‐Young

doi:10.1109/tvlsi.2009.2025280

Cited by 36 publications

(11 citation statements)

References 12 publications

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“…An explorer with performance estimator is shown in Figure 2. Examples of such approaches are [4][5][6][7][8][9][10][11][12][13][14][15].…”

Section: Fig 1: Asip Design Methodologymentioning

confidence: 99%

ADA: Applications Define ASIP

Jain¹

2014

IJCA

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Interest in Application Specific Instruction set Processors or ASIPs has increased significantly. Sincere efforts have been put in improving ASIP design methodologies in industry as well as in academia. By the close observation and analysis of these approaches, it was found that though the existing approaches are focusing on making the process automatic and providing better GUI to help the designers, core technique used in deciding the suitable architecture (processor and memory) is based on design space exploration. This exploration is done with the help of estimators. Such estimators are either simulator based or scheduler based. This study identifies that both types of techniques are very far from the ideal dream technique in which applications should have defined the suitable architecture configuration and these techniques are becoming unsuitable in current scenario. Each problem has a solution hidden in it. This scenario motivated us to propose a novel and revolutionary ASIP design technique making the dream true. The Proposed technique does not focuses on design space exploration, it focuses on directly defining processors for given applications rather than searching for suitable configuration in a jungle of configurations can be suggested by the architecture design space. General TermsComputer Architecture, Processor Design, Processor Design Technology.

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“…An explorer with performance estimator is shown in Figure 2. Examples of such approaches are [4][5][6][7][8][9][10][11][12][13][14][15].…”

Section: Fig 1: Asip Design Methodologymentioning

confidence: 99%

ADA: Applications Define ASIP

Jain¹

2014

IJCA

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“…Lambrechts and colleagues (Lambrechts et al, 2008;Mei et al, 2005) and Bouwens et al (Bouwens et al, 2007(Bouwens et al, , 2008 test various architectural options for ADRES like CGRAs and introduce optimizations to this architecture. Kim et al (Kim et al, 2010) perform an architectural search over arrangements of components in non-traditional patterns to optimize design criteria. We have not seen any cross-architectural studies that compare both mesh and stripe-based architectures.…”

Section: Cross-architectural Studiesmentioning

confidence: 99%

“…Good tools are needed to allow designers to identify efficient architectures for an application domain. Some of these design space exploration tools have already been developed, laying groundwork for progress in this direction (e.g., (Hartenstein et al, 2000b), (Karuri et al, 2008), (Bauer et al, 2009), (Kim et al, 2010)). However, one bottleneck for any of these tools is that it can be time consuming and difficult to properly evaluate a proposed architecture, especially if that architecture is quite novel or highly customized.…”

Section: Introductionmentioning

confidence: 99%

Crowdsourcing the mapping problem for design space exploration of custom reconfigurable architecture designs

Sistla¹,

Patel²,

Mehta³

2015

HCj

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One of the grand challenges in the design of portable/wearable electronics is to achieve optimal efficiency and flexibility in a tiny low power package. Coarse grained reconfigurable architectures (CGRAs) hold great promise for low power, high performance, and flexible designs for a domain of applications. CGRAs are very promising due to the ability to highly customize such architectures to an application domain. However, greater customization makes the mapping of applications onto these architectures very challenging. Good tools and fast, effective mapping algorithms are needed to support design space exploration for CGRAs. In particular, the mapping problem has been difficult to solve in a satisfying and general way. In this paper, we present an architectural design flow using crowdsourcing to provide mappings of benchmarks onto new architectures. We show that the crowd can provide high quality, reliable mappings, significantly outperforming our custom Simulated Annealing algorithm in almost all cases. We further show that the crowd can provide other types of feedback that are difficult to obtain from an automatic mapping algorithm. Our proof of concept cross-architectural study supports an 8Way or 4Way1Hop architecture as a top choice, concludes that a custom modification that constrains inputs and outputs consumes less energy but requires more area than its less constrained counterpart, and suggests that Stripe architectures are interesting to consider because they perform nearly as well as our mesh variants and may present a more straightforward mapping problem for the crowd or an automatic mapping algorithm.

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“…In [2], [4] and [10] a quantitative approach has been used to cope with this issue. This approach strongly depends on designer observations and decisions on the statistics gathered from the applications.…”

Section: B Design Space Exploration Using Cansomentioning

confidence: 99%

A combined analytical and simulation-based model for performance evaluation of a reconfigurable instruction set processor

Mehdipour¹,

Noori²,

Javadi³

et al. 2009

2009 Asia and South Pacific Design Automation Conference

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Performance evaluation is a serious challenge in designing or optimizing reconfigurable instruction set processors. The conventional approaches based on synthesis and simulations are very time consuming and need a considerable design effort. A combined analytical and simulation-based model (CAnSO * ) is proposed and validated for performance evaluation of a typical reconfigurable instruction set processor. The proposed model consists of an analytical core that incorporates statistics gathered from cycle-accurate simulation to make a reasonable evaluation and provide a valuable insight. Compared to cycle-accurate simulation results, CAnSO proves almost 2% variation in the speedup measurement.

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Design Space Exploration for Efficient Resource Utilization in Coarse-Grained Reconfigurable Architecture

Cited by 36 publications

References 12 publications

ADA: Applications Define ASIP

ADA: Applications Define ASIP

Crowdsourcing the mapping problem for design space exploration of custom reconfigurable architecture designs

A combined analytical and simulation-based model for performance evaluation of a reconfigurable instruction set processor

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