Design of New Reconfigurable Architecture for Implementing a Least Mean Square Finite Impulse Response Filter Using Borrow Select Subtraction (BSLS)

Abstract

A design of reconfigurable architecture of FIR filter has been implemented using a Least Mean Square (LMS) adaptive filter. LMS adaptive filter is mainly sued for reducing the coefficients of the filter. Generally, a LMS filter contains normal adder, subtractor, mixer and a delay part. Most of the concepts deal with an adder namely Full Adder (FA), Ripple Carry Adder (RCA), Carry Select Adder (CSLA), etc., Instead of using CSLA; Borrow Select Subtractor (BSLS) is used in LMS filter architecture. By using BSLA LMS adaptive filter in a reconfigurable FIR filter architecture in the proposed scheme, the area, power and delay will be reduced. The proposed scheme achieves better performance when compared to an existing scheme. The proposed method is implemented in ModelSim tool and efficiency has been calculated by using the device Virtex 6 Low Power in Xilinx ISE Design Suite 12.4.