Design of New Logic Architectures Utilizing Optimized Suspended-Gate Single-Electron Transistors

Abstract

Abstract-The operation and performances of the suspendedgate single-electron transistor are investigated through simulation. The movable gate is 3-dimensionally optimized so that low actuation voltage (0.4V), fast switching (1 ns) and ultra-low pull-in energy (0.015 fJ) are simulated. A two-state capacitor model based on the 3D results is then embedded with a singleelectron transistor analytical model in a SPICE environment to investigate the operation of the device. Through the control of the Coulomb oscillation characteristics, the position of the movable gate enables a background charge insensitive coding of the information. New circuit architectures with applications in cellular non-linear network and pattern matching are also proposed and simulated.

Power gain improvement for single-electron transistors

“…1) To the best of our knowledge, up to now, although extensive research on SET has been performed for years, most of them mainly concentrates on its logical applications utilizing its Coulomb oscillation and Coulomb staircase. 2,3) There are also reported literatures focusing on radiofrequency SET (RF-SET) which treat RF-SET as electrometers. 4,5) In addition, due to the fact that tunnel current of SET is extremely small, some other literatures focused on co-operation of SET/MOSFET (metal oxide semiconductor field-effect transistor) in order to amplify inherently weak signals of the SET circuits utilizing high gain characteristic of MOSFET.…”