Design of Low Power Shift Register in Nano Scale Domain Using FinFET

Abstract

In this paper, we have calculated and described the Shift Register Design using FinFET. Shift Register is used as to shift the value of any register, in microprocessor, microcontroller and shifted value is also equal to multiplication of any binary no. by 2. According to Moore's law the no. of transistor in a scrupulous chip area is doubled in every 18 months. This proclamation gives new epoch of VLSI meadow. If we want to increase the no. of component in chip area so we reduce the size of component. Applying this attribute in chip component, the size of transistor reduced. As we scale down the device parameter after a certain rule, the short channel effects like leakage power, surface scattering, velocity saturations, takes place. Fin-FET is a superior device to eradicate or decrease above mentioned problems. We analyze the various parameters like temperature effect to the total power, total power consumption, average DC power, calculation etc. For calculation these results we are using cadence tools. After simulating the circuit we get values of Average DC power is 777.6 nW, Average Transient Power Consumption is 67.20 nW, Delay is 20 nS.

Towards Microscale NFC-Enabled IoT Sensors: Physical and MAC Layer Design Analysis

“…We believe that this range of power is sufficient for our mote, which utilizes basic components such as logic gates, timing clocks, and registers. For instance, a low-power shift register design in nanoscale that consumes an average transient power of 67.2 nW (−41.73 dBm) is demonstrated in [26]. In [27] a typical mote of size 5×5 mm is comprised of a chip and antenna requires a power of 10.7 µW (−19.71 dBm).…”

“…Taking complexity and power consumption into consideration, we select amplitude shift keying (ASK) and binary phase shift keying (BPSK) as the simplest digital modulation techniques for load modulation in the mote, and Hamming (15,11) and Reed-Solomon (RS) (31,26) codes as short linear block codes for error-correction coding. The ASK and BPSK modulation schemes proposed can be implemented in µm scale [30], [31].…”