Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters

Aminzadeh, Hamed; Danaie, Mohammad; Lotfi, Reza

doi:10.1016/j.vlsi.2007.05.003

Cited by 19 publications

(12 citation statements)

References 6 publications

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“…This has been formerly authenticated by the authors in [24] in which high-speed two-stage amplifiers have been considered.…”

Section: Introductionmentioning

confidence: 70%

Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Aminzadeh

2011

Circuit Theory & Apps

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SUMMARYIn analog signal-processing applications, settling performance of the employed operational amplifiers (opamps) is usually of great matter. Under low-voltage environment of modern technologies where only a few transistors are allowed to be stacked, three-stage amplifiers are gaining more interest. Unfortunately, design and optimization of three-stage opamps based on settling time still suffer from lack of a comprehensive analysis of the settling behavior and closed-form relations between settling time/error and other parameters. In this paper, a thorough analysis of the settling response of three-stage nestedMiller-compensated opamps, including linear and non-linear sections, is presented. This analysis leads to a design methodology which determines the circuit requirements for desired settling time/error. Based on settling time, it allows optimizations in power consumption and area.

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“…This has been formerly authenticated by the authors in [24] in which high-speed two-stage amplifiers have been considered.…”

Section: Introductionmentioning

confidence: 70%

Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Aminzadeh

2011

Circuit Theory & Apps

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“…The meansquare error (MSE) between the two curves is equal to 18 f F. H. Aminzadeh Figure 2 illustrates a two-stage fully-di®erential operational ampli¯er with Ahujastyle or cascode compensation. 7,8,13 To stabilize this ampli¯er under negative feedback, each half-circuit embeds a compensation capacitor (C C ) in series with a current bu®er (M C ). 8,13 Beside pole-splitting when inserting C C , 6 the current bu®ers further stabilize the ampli¯er by pushing nondominant poles to higher frequencies.…”

Section: Depletion-mode Moscaps: C{ {V Modelmentioning

confidence: 99%

“…7,8,13 To stabilize this ampli¯er under negative feedback, each half-circuit embeds a compensation capacitor (C C ) in series with a current bu®er (M C ). 8,13 Beside pole-splitting when inserting C C , 6 the current bu®ers further stabilize the ampli¯er by pushing nondominant poles to higher frequencies. 12 PCDMs are used to realize the compensation capacitors of this topology.…”

Section: Depletion-mode Moscaps: C{ {V Modelmentioning

confidence: 99%

“…To gain more insight into the operation of this ampli¯er, it is worth mentioning that the settling response is generally comprised of two sections: nonlinear (slewing) and linear (small-signal). 8,9,12,16 For this ampli¯er during nonlinear section, MOSCAPs alter in accordance with output. This makes slewing a function of the output voltage as opposed to a conventional design that experiences a constant slew-rate (SR).…”

Section: Mosfet-only Ampli¯ers With Cascode Compensationmentioning

confidence: 99%

“…7,8,13 These current bu®ers feed the ac signal back within an inherent feedback loop and further push parasitic poles and zeros away to higher frequencies. 8,14 The aim of this research is to analyze and model the behavior of a two-stage CMOS ampli¯er when nonlinear depletion-mode MOSCAPs are replaced and employed as compensation capacitors. Without any design consideration, capacitance nonlinearity H. Aminzadeh…”

Section: Introductionmentioning

confidence: 99%

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Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Aminzadeh

2013

J CIRCUIT SYST COMP

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Nano-scale area-e±cient MOS devices are employed in this article to stabilize high-speed operational ampli¯ers (opamps) for those applications that deal with negative feedback. As an alternative choice, metal-insulator-metal (MIM) capacitors cannot be integrated in every technology as they require additional process masks. Moreover, these components su®er from large silicon area. In this paper, considerations of a successful MOSFET-only ampli¯er design are highlighted and described. These considerations make it possible to fabricate these ampliers for a nano-scale digital system-on-chip (SoC). Circuit-level simulations include comparison between MOS capacitors (MOSCAPs) with MIM capacitors (MIMCAPs) in two identical processes. The e±ciency of the given design considerations are also validated through simulation in 90-nm CMOS technology. A MOSFET-only ampli¯er is designed as the main part of a 5 MS/s sample-and-hold. Using the proposed design techniques, the MOSFET-only ampli¯er with Miller compensation recovers 51% silicon die with respect to a MIMCAP ampli¯er for identical signal-to-noise-plus-distortion (SNDR) ratio.

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Accurate Calculation of the Settling Time of a Linear System Using New Expressions and Iterative Algorithms

Chagra

2017

Circuits Syst Signal Process

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Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters

Cited by 19 publications

References 6 publications

Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Accurate Calculation of the Settling Time of a Linear System Using New Expressions and Iterative Algorithms

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