Abstract:A high-gain low-power CMOS low-noise amplifier is simulated using TSMC 0.18-μm CMOS technology. The cascade topology is used to get the highgain and low-noise figure value. The source degeneration technique is used for the wideband matching. The circuit is simulated for 3.1-10.6 GHz in ultawideband. The simulated results show the maximum gain of 21.574 dB at 6.378 GHz and positive gain maintained during the entire frequency range. The highest noise figure value is 4.311 dB at 7.662 GHz, and the lowest value is… Show more
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