2014
DOI: 10.1155/2014/217495
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Design of Finite Word Length Linear-Phase FIR Filters in the Logarithmic Number System Domain

Abstract: Logarithmic number system (LNS) is an attractive alternative to realize finite-length impulse response filters because of multiplication in the linear domain being only addition in the logarithmic domain. In the literature, linear coefficients are directly replaced by the logarithmic equivalent. In this paper, an approach to directly optimize the finite word length coefficients in the LNS domain is proposed. This branch and bound algorithm is implemented based on LNS integers and several different branching st… Show more

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Cited by 10 publications
(16 citation statements)
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“…Basetas et al [6] show that LNS requires a reduced word length when implementing FIR and infinite impulse response filters. Alam and Gustafsson have also shown [2] that LNS improves the approximation error by around 20% when designing FIR filters as compared to a fixed-point design. Coleman proposed a 32-bit logarithmic processor and concludes that LNS provides faster execution, more accuracy and reduced architectural complexity as compared to single-precision 32-bit floating point, provided that the adder/subtractor has a latency less than that of a 32 × 32-bit multiplier.…”
Section: Related Workmentioning
confidence: 98%
See 3 more Smart Citations
“…Basetas et al [6] show that LNS requires a reduced word length when implementing FIR and infinite impulse response filters. Alam and Gustafsson have also shown [2] that LNS improves the approximation error by around 20% when designing FIR filters as compared to a fixed-point design. Coleman proposed a 32-bit logarithmic processor and concludes that LNS provides faster execution, more accuracy and reduced architectural complexity as compared to single-precision 32-bit floating point, provided that the adder/subtractor has a latency less than that of a 32 × 32-bit multiplier.…”
Section: Related Workmentioning
confidence: 98%
“…Compared to floating point, LNS dramatically simplifies the hardware needed for multiplication, division, and square root. Multiplication and division become fixedpoint addition and subtraction of the exponents, which can be implemented with a simple integer adder [2,22]. Square root is computed by dividing the exponent by two, which can be implemented by simply dropping the least-significant bit of the fixed-point exponent.…”
Section: Introductionmentioning
confidence: 99%
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“…For low-power architectures, many techniques are used [6]. An integer linear programming (ILP) approach to design optimal finite wordlength linear-phase FIR filters in the logarithmic number system (LNS) domain has been proposed in [7], and different input wordlength and filter taps are adopted in [8]. In [9], a reduced dynamic signal representation technique is used.…”
Section: Introductionmentioning
confidence: 99%