Design of CMOS Two-stage Operational Amplifier for ECG Monitoring System Using 90nm Technology

Moulahcene, Fateh; Bouguechal, Nour-Eddine; Benacer, Imad; Hanfoug, Saleh

doi:10.14257/ijbsbt.2014.6.5.07

Cited by 17 publications

(6 citation statements)

References 16 publications

(9 reference statements)

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“…6 and it is used in many practical systems such as Biomedical, RF Systems etc. [39]. The aim of the problem is to find the optimum transistor dimensions so that chip area is minimized and also the design specifications such as Gain, CMRR, Power Dissipation etc.…”

Section: Analog Circuit Sizing Of a Cmos Operational Amplifiermentioning

confidence: 99%

HWPSO: A new hybrid whale-particle swarm optimization algorithm and its application in electronic design optimization problems

Laskar

Guha

Chatterjee³

et al. 2018

Appl Intell

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In this paper, a new population based hybrid meta-heuristic algorithm called the Hybrid Whale-Particle Swarm Optimization Algorithm (HWPSO) for solving complex optimization problems has been proposed. The proposed algorithm tries to overcome the limitations associated in a Particle Swarm Optimization (PSO) exploration phase i.e. Stagnation Effect, by hybridizing with a whale optimization algorithm (WOA) in a novel way as WOA has been reported to have very good exploration capability. During hybridization, two novel techniques have been employed, namely 'Forced' Whale and 'Capping' Phenomenon. The 'Forced' WOA is introduced in exploration phase and it enables the WOA to guide PSO for better local optima avoidance and concurrently a new 'Capping' phenomenon is employed which restricts the WOA search mechanism during exploitation phase, thereby converging the solution faster to a global optimum value. The performance of the proposed HWPSO has tested on 18 benchmark mathematical functions and 3 Electronics Design Optimization problems. The simulation results indicate that the proposed algorithm outperforms many state of the art algorithms by achieving a better optima with a very low standard deviation for most of the benchmark functions used. The effectiveness of the proposed HWPSO has been also validated by statistical as well as complexity analysis. The performance of HWPSO algorithm is also found to be satisfactory in all three cases of electronics design optimization problems, which have been further validated with standard design tools and found to be in close agreement with each other.

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Section: Analog Circuit Sizing Of a Cmos Operational Amplifiermentioning

confidence: 99%

HWPSO: A new hybrid whale-particle swarm optimization algorithm and its application in electronic design optimization problems

Laskar

Guha

Chatterjee³

et al. 2018

Appl Intell

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show abstract

“…The folded cascode amplifier can also able to achieve low power consumption and low noise design [10], [11]. PMOS transistor was used as the input transistors because it can achieve higher CMRR and lower flicker noise since the flicker noise is inversely proportional with the size of the transistor [12]. Figure 1 shows the proposed folded cascode operational amplifier with self-biasing circuit.…”

Section: Design Topologymentioning

confidence: 99%

Low Power CMOS Electrocardiogram Amplifier Design for Wearable Cardiac Screening

Weng

Isaak

Yusof

2018

IJECE

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The trend of health care screening devices in the world is increasingly towards the favor of portability and wearability. This is because these wearable screening devices are not restricting the patient’s freedom and daily activities. While the demand of low power and low cost biomedical system on chip is increasing in exponential way, the front-end electrocardiogram (ECG) amplifiers are still suffering from flicker noise for low frequency cardiac signal acquisition, 50Hz power line electromagnetic interference, and the large unstable input offsets due to the electrode-skin interface is not attached properly. In this paper, a CMOS based ECG amplifier that suitable for low power wearable cardiac screening is proposed. The amplifier adopts the highly stable folded cascode topology and later being implemented into RC feedback circuit for low frequency DC offset cancellation. By using 0.13µm CMOS technology from Silterra, the simulation results show that this front-end circuit can achieve a very low input referred noise of 1pV/Hz1/2 and high common mode rejection ratio of 174.05dB. It also gives voltage gain of 75.45dB with good power supply rejection ratio of 92.12dB. The total power consumption is only 3µW and thus suitable to be implemented with further signal processing and classification back end for low power wearable biomedical device.<br /><br />

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“…The higher the Q, the narrow the notch can be achieved and higher the level of attenuation needed to remove the unwanted signal. Q is designed to 100 so degree of filter's performance increased [10].Gain of the filter was designed to 2. Notch frequency is calculated by :…”

Section: Notch Filtermentioning

confidence: 99%

Development of Electrocardiograph Monitoring System

Rosli

Omar

Hasan

et al. 2018

MATEC Web of Conferences

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Abstract. Electrocardiograph (ECG) monitoring system is one of the diagnostic tools which can help in reduce the risk of heart attack. A cardiologist may be able to determine heart condition from the ECG signal that recorded from subject. The purpose was to design an ECG monitoring system which consists of ECG circuit and digital signal processing system to deny the unwanted signal. In general, the ECG signal is nature weak and only around 1mV amplitude. Therefore filter and amplifier circuits were designed into 3 stages with a total gain of 1000 to bring the signal to around 1V. Circuit designed included of instrumentation amplifier, bandpass filter and notch filter. The frequency bandwidth of ECG is between 0.05Hz until 100Hz. Schematic circuit was tested by software simulation before proceeding to hardware implementation. Simulation analysis was done by using Software Proteus 8 Professional while the further signal processing was done in MATLAB software environment. A PQRST ECG waveform can be seen clearly after digital filtering stage in MATLAB environment. Digital signal processing in MATLAB software included of pre-filtering, Fast Fourier transform and peak detection. As conclusion, the time interval between peaks can be determined automatically which can provide useful information in clinical aspect.

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Design of CMOS Two-stage Operational Amplifier for ECG Monitoring System Using 90nm Technology

Abstract: Abstract

Cited by 17 publications

References 16 publications

HWPSO: A new hybrid whale-particle swarm optimization algorithm and its application in electronic design optimization problems

HWPSO: A new hybrid whale-particle swarm optimization algorithm and its application in electronic design optimization problems

Low Power CMOS Electrocardiogram Amplifier Design for Wearable Cardiac Screening

Development of Electrocardiograph Monitoring System

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