2019 IEEE Wireless Power Transfer Conference (WPTC) 2019
DOI: 10.1109/wptc45513.2019.9055685
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Design of Buck Converter with Dead-time Control and Automatic Power-Down System for WSN Application

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Cited by 4 publications
(2 citation statements)
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“…To ensure that the system operates properly, a delay circuit is used to manage the dead time between switching events. The resulting clocks drive the power switches via the drivers to achieve the buck effect [36]. The driver circuit, depicted in Figure 11, generates VPS and VNS to drive the excessive gate capacitance induced by the size of the power switches.…”
Section: Non-overlapping Clocks Generator and Driver Circuitsmentioning
confidence: 99%
“…To ensure that the system operates properly, a delay circuit is used to manage the dead time between switching events. The resulting clocks drive the power switches via the drivers to achieve the buck effect [36]. The driver circuit, depicted in Figure 11, generates VPS and VNS to drive the excessive gate capacitance induced by the size of the power switches.…”
Section: Non-overlapping Clocks Generator and Driver Circuitsmentioning
confidence: 99%
“…The power transistors of the boost converter, carry a high current. Still, when the P-channel and N-channel power switches are switched on together, they could potentially burn out as the voltage source is short-circuited to the ground [23]. To separate the two power switches' on-times and interleave the Vduty produced through the hysteresis controller, the non-overlapping clocks generator circuit is employed.…”
Section: Non-overlapping Clocks Generator Circuitmentioning
confidence: 99%