Proceedings of the Great Lakes Symposium on VLSI 2017 2017
DOI: 10.1145/3060403.3060409
|View full text |Cite
|
Sign up to set email alerts
|

Design of Approximate Logarithmic Multipliers

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1

Citation Types

0
11
0

Year Published

2018
2018
2023
2023

Publication Types

Select...
4
2
1

Relationship

1
6

Authors

Journals

citations
Cited by 16 publications
(11 citation statements)
references
References 12 publications
0
11
0
Order By: Relevance
“…• Approximate Arithmetic Circuits: simplify circuit designs to achieve an approximate operation of the desired function, such as addition, multiplication and division. The main approximate arithmetic units include approximate adder [32], [33], approximate multipliers [34], [35], [36] and approximate dividers [37] that have been proposed. Other approximate circuits have approximate fast fourier transform (FFT) [38] and approximate CORDIC [39].…”
Section: A Design Objectivesmentioning
confidence: 99%
See 1 more Smart Citation
“…• Approximate Arithmetic Circuits: simplify circuit designs to achieve an approximate operation of the desired function, such as addition, multiplication and division. The main approximate arithmetic units include approximate adder [32], [33], approximate multipliers [34], [35], [36] and approximate dividers [37] that have been proposed. Other approximate circuits have approximate fast fourier transform (FFT) [38] and approximate CORDIC [39].…”
Section: A Design Objectivesmentioning
confidence: 99%
“…Therefore, nondeterministic approximate designs have limited reproducibility. The examples of deterministic approximate computing techniques in the above mentioned publications are [14], [16], [18], [15], [17], [19], [23], [24], [29], [30], [32], [33], [34], [35], [36], [34], [35], [36]. The non-deterministic approximate computing techniques of the above mentioned research include [20], [21], [25], [26], [27], [28], [40], [41].…”
Section: A Design Objectivesmentioning
confidence: 99%
“…In this section the proposed multipliers are compared with ten other multipliers: truncated1 [7], truncated2 [8], truncated3 [9], LOA [5], Momeni [15], Ma [16], Liu [13,14], Kulkani [11], Accurate3:2 (the Dadda multiplier constructed by 3:2 precise compressors), and Accurate4:2 (the Dadda multiplier constructed by 4:2 precise compressors). Table 4 shows the MSE, the delay, the number of transistors, and the product of delay and the number of transistors (PDT) of each multiplier.…”
Section: Simulationsmentioning
confidence: 99%
“…In [12], an approximate signed multiplier was proposed which is 20% faster than a precise signed multiplier. In [13,14], in order to reduce the carry propagation delay, an approximate adder was proposed that compute i-th bit of the summation of the two number A and B, i.e. Si, based on only the i-th and (i-1)-th bit of the two numbers.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation