Design of an Efficient Charge‐Trapping Layer with a Built‐In Tunnel Barrier for Reliable Organic‐Transistor Memory

Park, Young-Su; Lee, Jang‐Sik

doi:10.1002/adma.201404625

Cited by 46 publications

(46 citation statements)

References 31 publications

(49 reference statements)

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“…Therefore, the mixture was stirred thoroughly to mix it. After mixing, the solution was red because of the surface plasmon resonance of Au NPs . The color started to darken after 3 h due to agglomeration of Au NPs, and was dark purple after 12 h .…”

Section: Resultsmentioning

confidence: 99%

Control of Gold Nanoparticle–Protein Aggregates in Albumen Matrix for Configurable Switching Devices

Kim

Hwang

Lee

2018

Adv Materials Inter

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advantages of low-cost fabrication, disposability, and biocompatibility. [10] In particular, proteins have electrochemical properties, and therefore show promise in bioelectronic applications. Several groups have used proteins as the insulating layer in ReRAM. [7,[11][12][13] Albumen has recently been evaluated as a candidate for next-generation nonvolatile memory devices. [14,15] It has the advantages that it can be obtained directly from egg without extraction or further processing. Also, albumen has been applied as an insulating layer or dielectric layer to fabricate RS memory devices and thinfilm transistors. [9,16] Fe ions in the albumen form trap sites for electron transfer. If sufficient electrical bias is applied, reduced Fe ions form a conductive filament, so the albumen assumes LRS; then if sufficient opposite bias is applied, the Fe ions are oxidized, and the conductive filament ruptures, so the albumen assumes HRS. The presence of this RS effect suggests that albumen may be usable as an active layer in RS memory. Additionally, further improvement of the device's memory characteristics, such as reduced set voltage V SET and reset voltage V RESET or uniform switching properties, has been achieved by using ferritin protein to embed Pt nanoparticles (NPs) in NiO structure. [17] Also, embedding Au NPs in a silk protein layer reduced the V SET and V RESET of a ReRAM device. [18] In this study, we mixed Au NPs with albumen to improve its RS behavior. The charge-trapping characteristics of Au NPs were expected to reduce V SET and V RESET and give wide memory windows. [19] The use of protein-nanoparticle (P-NP) suspensions as memory has the disadvantage that the proteins interact and agglomerate with Au NPs in the solution, so the RS property in the fabricated memory devices changes. Therefore, controlling the degree of agglomeration is a key requirement to control the RS behaviors of ReRAM devices based on albumen with Au NPs. Proteins of albumen consist of amino chains that include sulfhydryl groups (R-SH), which can react with Au NPs and cause agglomeration; as a result, the memory characteristic changes from programmable RS to read-only memory. [11,20,21] Here, we characterize the RS behaviors of ReRAM based on albumen with Au NPs. We report how proteins interact with Au NPs to form clusters and affect the RS. We also suggest a switching mechanism of Au NPs-embedded protein-based ReRAM. This work is a significant step toward fabrication of biocompatible ReRAMs for configurable memory devices by controlling agglomeration of metal NPs in protein.Protein-nanoparticle (P-NP) interactions are of great importance in the biomedical applications, and are extensively studied for biotechnology and biomedicine applications, for example, cancer therapy, drug delivery, as well as biosafety area. Here, it is shown that P-NP interactions can have applications as resistive memory. It is demonstrated that the nature of resistive switching changes from programmable memory to read-only memory when the NPs aggregate in the pr...

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Section: Resultsmentioning

confidence: 99%

Control of Gold Nanoparticle–Protein Aggregates in Albumen Matrix for Configurable Switching Devices

Kim

Hwang

Lee

2018

Adv Materials Inter

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“…It is a challenge to create intrinsic traps in the dielectric layer without high temperature processing steps [1]. While low temperature processed memory devices fabricated from polymers have been demonstrated as an alternative [2][3][4][5][6][7], their performance degrade rapidly after a few cycles of operation [8][9][10][11][12][13][14]. Moreover conventional memory devices need the support of tunneling and blocking layers since the memory dielectric or polymer is incapable of preventing memory leakage [15][16][17].…”

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Low temperature below 200 °C solution processed tunable flash memory device without tunneling and blocking layer

Mondal

Venkataraman

2019

Nat Commun

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Intrinsic charge trap capacitive non-volatile flash memories take a significant share of the semiconductor electronics market today. It is challenging to create intrinsic traps in the dielectric layer without high temperature processing steps. The main issue is to optimize the leakage current and intrinsic trap density simultaneously. Moreover, conventional memory devices need the support of tunneling and blocking layers since the charge trapping dielectric layer is incapable of preventing the memory leakage. Here we report a tunable flash memory device without tunneling and blocking layer by combining the discovery of high intrinsic charge traps of more than 10 12 cm −2 , together with low leakage current of less than 10 −7 A cm −2 in solution derived, inorganic, spin-coated dielectric films which were heated at 200 °C or below. In addition, the memory storage capacity is tuned systematically upto 96% by controlling the trap density with increasing heating temperature.

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“…Among the many approaches, chargeable organic transistor memory (COTM) which exploits the electrical bistability originating from the modulation of channel conductance by charge trapping in the gate dielectric systems confers unique advantages such as nondestructive data read‐out, circuit architectural compatibility, single transistor realization, and reliable switching characteristic . Among the tremendous research progress over the past decades, much attention has been focused on exploring architectures based on floating gates and chargeable electrets using different materials systems, including small molecule, conjugated polymer as well as oxide semiconductors. Substantial improvements in flexibility, memory window (MW) and retention, capability of multibit storage, and realization of new functionalities, for example, pressure sensors integrated into memory arrays have been achieved.…”

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confidence: 99%

“…The writing timescales reported for COTMs based on chargeable gate systems range from microseconds to seconds . In terms of writing speed polymer electret‐based architectures tend to outperform floating‐gate devices as the latter inevitably comprise relatively thick tunneling dielectrics to ensure reliable isolation of the floating gates.…”

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A Vertical Organic Transistor Architecture for Fast Nonvolatile Memory

2016

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Design of an Efficient Charge‐Trapping Layer with a Built‐In Tunnel Barrier for Reliable Organic‐Transistor Memory

Cited by 46 publications

References 31 publications

Control of Gold Nanoparticle–Protein Aggregates in Albumen Matrix for Configurable Switching Devices

Control of Gold Nanoparticle–Protein Aggregates in Albumen Matrix for Configurable Switching Devices

Low temperature below 200 °C solution processed tunable flash memory device without tunneling and blocking layer

A Vertical Organic Transistor Architecture for Fast Nonvolatile Memory

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