Design of a parametrizable low cost Ethernet MAC core for SoC solutions

Abstract

This paper describes an efticient Ethemet Medium Access Control (MAC) design, according to IEEE 802.3 standards for Fast Ethernet (100 M p s ) an IOBase-T (IO Mbps) implementations in full and half duplex modes, suitable for re-use as Intellechral Property (IP) core in Svstem-on-Chip (SOC) designs. The description and contributed results exhibit that the main advantages of this design reside in a really low logic cost keeping a great tolerance far external clock changes, a suppression of high working clack ,frequencies and domains, and a high confgurability and flexibility for master processors interface.0-7803-8160-2/03/$17.00 02003 IEEE.