Design of a novel chip on glass package solution for CMOS image sensor device

Chen, Ching-Yang; Chao, Yung-Ching; Liu, De‐Shin; Zhuang, Zhen-Wei

doi:10.1016/j.microrel.2005.12.003

Cited by 6 publications

(1 citation statement)

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“…The high-temperature gradient during the ACF bonding process has been reported to cause the warpage of glass substrate due to the CTE mismatch between the glass substrate and the silicon-based chips. 5,6 Tsai et al investigated the effects of the parameters such as thermal and moisture expansion of the ACF and its elastic modulus and fillets on the warpage of ACF-bonded COG packages using a test structure (30 × 20 × 0.7 mm). 7 They suggested that warpage of the COG package could be reduced by thermal cycling up to 85°C and precisely controlling the small CTE mismatch between the Si chip and the glass substrate, while insensi-tive to the bonding temperature.…”

Section: Introductionmentioning

confidence: 99%

Effects of localized warpage and stress on chip‐on‐glass packaging: Induced light‐leakage phenomenon in mid‐sized TFT‐LCD

Leu¹,

Chang²,

Chen³

et al. 2012

J Soc Info Display

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Abstract— Mura defects become visible in a 13.3‐in. TFT‐LCD using chip‐on‐glass (COG) packaging when the thickness of the glass substrate is decreased from 0.5 to 0.3 mm. Mura, the non‐uniform brightness in LCDs, is caused by COG packaging due to the mismatch of the coefficient of thermal expansion (CTE) and Young's modulus between the glass substrate and the IC‐driver Si chips. In this paper, a 3‐D finite‐element‐analysis (FEA) model, coupled with transient thermal analysis is first established to examine the warpage and stress behavior in the upper‐glass‐plate post‐COG‐package processing for identifying the root causes of the light‐leakage phenomenon. Prior to that, the simulated warpage results are validated by surface‐contour measurement. Data and modeling results show that a low bonding temperature together with a low modulus in novel ACF materials can effectively eliminate Mura. Besides, thinner silicon or a shorter length of Si chips as drivers offers enhanced reduction in the localized warpage, and thus can be a practical and low‐cost solution for eliminating mura defects.

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Section: Introductionmentioning

confidence: 99%