2006 European Microwave Conference 2006
DOI: 10.1109/eumc.2006.281369
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Design of a Distributed Oscillator in 130 nm SOI MOS Technology

Abstract: In this paper, the design and the results of a Silicon-on-Insulator (SOI) CMOS distributed amplifier (DA) and oscillator are presented. The four stage Cascode DA (CDA) is designed with a 130 nm SOI floating body n-MOSFET in each stage requiring a chip area of 0.75 mm 2 . A gain of 7 dB and a unity-gain bandwidth of 26 GHz are measured at 1.4 V supply voltage with a measured power consumption of 54 mW . The CDA circuit has been extended to design a cascode distributed oscillator (CDO) showing a 3 dBm carrier at… Show more

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Cited by 3 publications
(4 citation statements)
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“…It is of interest to study the suitability of these gain cells for different types of applications. While data are available for these in published literature, it is difficult to do a fair comparison since the available data are for different processes, power levels, and geometries .…”
Section: Design Of Gain Cellsmentioning
confidence: 99%
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“…It is of interest to study the suitability of these gain cells for different types of applications. While data are available for these in published literature, it is difficult to do a fair comparison since the available data are for different processes, power levels, and geometries .…”
Section: Design Of Gain Cellsmentioning
confidence: 99%
“…A Silicon‐on‐Insulator (SOI) 130‐nm CMOS n‐MOSFET cascode gain‐cell DO was reported in Ref. . This oscillator design achieved a 10 GHz oscillating frequency with 4.76 dBm power, and a phase noise of −113.77 dBc/Hz at a 2.5 V supply voltage.…”
Section: Dos and Distributed Voltage Controlled Oscillatorsmentioning
confidence: 99%
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