Design considerations of source and drain regions in nano double gate MOSFETs

Orouji, Ali A.; Mashayekhi, Hamid Reza; Charmi, Morteza

doi:10.1016/j.mssp.2012.04.011

Cited by 5 publications

(2 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The current research in this field is largely geared toward an increasing of the device density through an aggressive scaling of the device-feature sizes [1], and an improvement of the MOSFETstructure performances such as those of the double-gate (DG) MOSFETs [2][3][4], nano-wire FETs [5][6][7], nanoscale FinFETs [8,9], and nano-tube transistors [10]. As the channel length of the MOSFETs continues to shrink to several tens of nanometers, the source-to-drain and gate-tunneling of these near-ballistic devices and the inversion layers that are of a several-nanometer thickness, which are in the MOSFETs, become important issues [11].…”

Section: Introductionmentioning

confidence: 99%

Control of Short-Channel Effects in Nano DG MOSFET Using Gaussian-Channel Doping Profile

Charmi¹

2016

Transactions on Electrical and Electronic Materials

Self Cite

View full text Add to dashboard Cite

This article investigates the use of the Gaussian-channel doping profile for the control of the short-channel effects in the double-gate MOSFET whereby a two-dimensional (2D) quantum simulation was used. The simulations were completed through a self-consistent solving of the 2D Poisson equation and the Schrodinger equation within the non-equilibrium Green's function (NEGF) formalism. The impacts of the p-type-channel Gaussian-doping profile parameters such as the peak doping concentration and the straggle parameter were studied in terms of the drain current, on-current, off-current, sub-threshold swing (SS), and drain-induced barrier lowering (DIBL). The simulation results show that the short-channel effects were improved in correspondence with incremental changes of the straggle parameter and the peak doping concentration.

show abstract

Section: Introductionmentioning

confidence: 99%

Control of Short-Channel Effects in Nano DG MOSFET Using Gaussian-Channel Doping Profile

Charmi¹

2016

Transactions on Electrical and Electronic Materials

Self Cite

View full text Add to dashboard Cite

show abstract

“…Under such condition, source and drain resistance value becomes larger leading to a degradation of the ON-current. The impact of parasitic resistance is even more crucial in nanoscale DG device because it holds two channels for current flow [6,7]. Moreover, some recent studies have shown twofold decisive issues: the non-conformality of the doping process and the concentration-dependent indiffusion.…”

mentioning

confidence: 99%

Numerical investigation of nanoscale double‐gate junctionless MOSFET with drain and source extensions including interfacial defects

Bentrcia

Djeffal

Arar

et al. 2016

Phys. Status Solidi C

View full text Add to dashboard Cite

The use of uniformly doped channel, source and drain regions presents the well‐known problem of the high series resistance associated to the extensions, which degrades the electrical performance of the nanoscale multi‐gate junctionless MOSFETs. Therefore, new designs and accurate investigation of nanoscale double gate junctionless (DGJ) MOSFET including the defects at the interface Si/SiO2 are required for the comprehension of the fundamentals of such device behavior against the ageing phenomenon. Based on 2D numerical investigation of a nanoscale DGJ MOSFET, in the present work a numerical study for I‐V and small signal characteristics, by including both the highly doped extension regions and the interfacial defects, is presented. The investigated design, which is a technologically feasible technique by introducing only one ion implantation step, provides a good solution to improve the device immunity against the interfacial defects under critical conditions, where the channel length is taken equals to 10 nm. In this context, I‐V, analog and linearity characteristics are investigated by an appropriate 2‐D numerical modeling, where the obtained results are compared with those of the conventional DGJ MOSFETs. (© 2016 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

show abstract

Improved analog and RF performances of gate-all-around junctionless MOSFET with drain and source extensions

Djeffal

Ferhati

Bentrcia

2016

Superlattices and Microstructures

View full text Add to dashboard Cite

Design considerations of source and drain regions in nano double gate MOSFETs

Cited by 5 publications

References 17 publications

Control of Short-Channel Effects in Nano DG MOSFET Using Gaussian-Channel Doping Profile

Control of Short-Channel Effects in Nano DG MOSFET Using Gaussian-Channel Doping Profile

Numerical investigation of nanoscale double‐gate junctionless MOSFET with drain and source extensions including interfacial defects

Improved analog and RF performances of gate-all-around junctionless MOSFET with drain and source extensions

Contact Info

Product

Resources

About