2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014 2014
DOI: 10.1109/apec.2014.6803505
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Design considerations and development of gate driver for 15 kV SiC IGBT

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Cited by 67 publications
(26 citation statements)
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“…The low coupling capacitance is obtained by placing turns on opposite sides of a ferrite toroidal core covered with insulation [7]. The coupling capacitance curve of the gate driver is shown in Fig.…”
Section: B Gate Driver Development and Validationmentioning
confidence: 99%
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“…The low coupling capacitance is obtained by placing turns on opposite sides of a ferrite toroidal core covered with insulation [7]. The coupling capacitance curve of the gate driver is shown in Fig.…”
Section: B Gate Driver Development and Validationmentioning
confidence: 99%
“…All the tests up to 10 kV are done by building a boost converter from the available laboratory power supply of 3 kV. The complete details of the gate driver design, its testing and the robustness validation under high dv/dt are presented in [7]. …”
Section: B Gate Driver Development and Validationmentioning
confidence: 99%
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“…Based on these data, the 3-level NPC power circuit is designed. The design and validation of gate driver for the 15 kV SiC [GBT are provided in [10]. (Fig.…”
Section: Introductionmentioning
confidence: 99%
“…The major origin of a disturbance of the gate drive circuit is due to return current injected by high V/ during turn-off of the a power device switch [1,[6][7][8][9][10][11][12][13][14]. The feedback of a small fly back converter may be disturbed by its controlling circuit.…”
Section: Introductionmentioning
confidence: 99%