this paper presents a novel on-chip antenna using standard cMoS-technology based on metasurface implemented on two-layers polyimide substrates with a thickness of 500 μm. the aluminium groundplane with thickness of 3 μm is sandwiched between the two-layers. concentric dielectric-rings are etched in the ground-plane under the radiation patches implemented on the top-layer. the radiation patches comprise concentric metal-rings that are arranged in a 3 × 3 matrix. The antennas are excited by coupling electromagnetic energy through the gaps of the concentric dielectric-rings in the groundplane using a microstrip feedline created on the bottom polyimide-layer. the open-ended feedline is split in three-branches that are aligned under the radiation elements to couple the maximum energy. in this structure, the concentric metal-rings essentially act as series left-handed capacitances C L that extend the effective aperture area of the antenna without affecting its dimensions, and the concentric dielectric rings etched in the ground-plane act as shunt left-handed inductors L L , which suppress the surface-waves and reduce the substrates losses that leads to improved bandwidth and radiation properties. The overall structure behaves like a metasurface that is shown to exhibit a very large bandwidth of 0.350-0.385 THz with an average radiation gain and efficiency of 8.15dBi and 65.71%, respectively. It has dimensions of 6 × 6 × 1 mm 3 that makes it suitable for on-chip implementation.Antenna is the key component to enable wireless communication however their physical size is a function of the operating frequency. Applications of on-chip antennas is therefore limited to high-frequencies due to the large size of antenna at lower frequencies. Off chip antennas however offer the benefit of radiation efficiency as they can be implemented on low-loss dielectric substrates 1-6 ..Currently, antennas for front-end transceivers can be realised using three different methods, which include: (i) Antenna-in-Package (AiP), where the antenna is embedded in the IC's packaging; (ii) Antenna-on-Chip (AoC), where the antenna is realized on substrate; and (iii) this is a hybrid of AoC and AiP, where the radiating element is realized off-chip. Wire bonding and flip chip are the two commonly used interconnections techniques employed in AiP to connect the die and the antenna 7 . These types of interconnects are highly lossy at high frequencies due to impedance mismatch. The only viable solution to overcome this loss is by using on-chip antenna, which should significantly reduce the manufacturing cost of system-on-chip (SoC).The development of a truly efficient cost effective on-chip antenna is a challenging endeavour. The main challenges are attributed to (1) low resistivity of dielectric substrates, which is approximately 10 ohm-cm, contributes to substrate loss of 85% whereas metallization loss is only 15%; (2) high permittivity substrate confines most of the electromagnetic energy in the substrate rather than being radiated into free-space, which ...