Design and modeling of compact on-chip transformer/balun using multi-level metal windings for RF integrated circuits

Liang, Tao; Gillis, John; Wang, D.; Cooper, Preston

doi:10.1109/rfic.2001.935655

Cited by 11 publications

(3 citation statements)

References 3 publications

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“…W Lacking of a general and accurate approach, the transformer modeling takes too many efforts during circuit design. Furthermore, the inaccuracy of the model introduces obvious errors which limit the application of transformer [1][2][3][4][5].…”

Section: Introductionmentioning

confidence: 99%

“…Nowadays, there are several major modeling methods for on-chip transformer based on the research of spiral inductors [4,5] including physical elements calculation, EM simulation and curve fitting. But for four-port Y-parameter-based model extraction, numbers of elements of the matrix hinder the feasibility to fit measurement over broad-band frequency by the characteristic-function approach [6].…”

Section: Introductionmentioning

confidence: 99%

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A novel approach to parameter extraction for on-chip transformers

Wei

Shi

et al. 2007

Analog Integr Circ Sig Process

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In this paper, a novel approach to parameter extraction for on-chip transformers based on four-port Y-parameter is presented. Compared to the previous researches, the proposed fully parameter extraction from Yparameter has better accuracy and feasibility for both the simulation before prototype and the improvement of the design after the measurement. And the 4-port model of transformer provides the solution of the fully differential applications. The model agrees very well with measurements for a variety of transformer configuration up to its self-resonant frequency.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A novel approach to parameter extraction for on-chip transformers

Wei

Shi

et al. 2007

Analog Integr Circ Sig Process

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“…The signal from a frequency generator is usually single-ended, so when testing differential ICs, we need a high performance balun to convert the singleended signal to differential signal to feed diferential ICs. Baluns have been widely studied in recent years [1][2][3][4][5][6][7][8][9][10][11]. Most of the work are concentrated on the frequency range from a few hundreds MHz up to 3 GHz, and no work has been reported on the 5 GHz band so far.…”

Section: Introductionmentioning

confidence: 99%

Compact CMOS Baluns for the 4–10 GHz Band Applications

Yan

et al. 2005

Analog Integr Circ Sig Process

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In this paper, we proposed two baluns, a compact balun and a compact balun with imbalance compensation; both are implemented using the one-poly six-metal (1P6M) 0.18 µm CMOS process. Both baluns have good performance from 4 to 10 GHz, and consume less silicon area due to their compact structure. The self-resonant frequency is increased by properly selecting metal layer for each spiral winding. The compact balun has a magnitude imbalance of 1 dB and a phase imbalance of 4.6 degree from 4 to 10 GHz. With the imbalance compensation, the balun has a magnitude imbalance of 0.6 dB and a phase imbalance of 1.1 degree from 4-10 GHz. Much better results have been achieved for the compact balun with our proposed imbalance compensation method. Both baluns can be used to perform both single-ended/differential and differential/single-ended conversions in different configurations.

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