Design and implementation of sub 0.5‐V OTAs in 0.18‐μm CMOS

Kulej, Tomasz; Khateb, Fabian

doi:10.1002/cta.2465

Cited by 81 publications

(59 citation statements)

References 28 publications

(80 reference statements)

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“…Considering the FOM1 results, it is apparently seen that the proposed circuit outperforms the all other circuits, where the FOM1 score of it is 2816 while the runner-up [27] has a FOM1 of 920. Regarding the FOM2 results, the proposed circuits exhibits quite good performance (the runner-up with 730 FOM2 score) that is close to the best score (1170) achieved by [25].…”

Section: Discussionmentioning

confidence: 55%

Low Power-High Gain Bulk-Driven 3 Stages CMOS Miller OTA in 130nm Technology

Afacan

2020

Sakarya University Journal of Science

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The requirement of low-power analog circuits has been raised in recent years due to the strict limitation of power consumption in modern applications. Therefore, the trend in analog circuit design has been changed such that they are able to meet the required specifications with lower power dissipation. Design of low power operational transconductance amplifiers, which are the main building blocks in many analog applications, has been more pronounced to keep the power dissipation below certain levels. In this concern, this study presents a low power, highperforming bulk-driven 3 stages CMOS OTA in a 130 nm standard CMOS technology. The proposed circuit leverages the bulk-driven architecture at the input stage; thus it can operate under sub 1-V. The design process of the proposed OTA is explained in detail and the results are validated via post-layout simulations. The proposed OTA is powered by ±0.45 V symmetric voltage sources, where the power consumption is around 27 μW. The area overhead is only 0.0017 μm2. The open-loop gain, unity gain frequency, and the phase margin are 73.24 dB, 5.167 MHz, and 78 o , respectively. To demonstrate the performance of the proposed circuit, a comparison is made with other circuits published in the last five years considering the well-known figures of merit (FOMs). Comparison results indicate that the proposed solution outperforms the other circuits for small-signal operation while it is the runner-up for large-signal operation.

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Section: Discussionmentioning

confidence: 55%

Low Power-High Gain Bulk-Driven 3 Stages CMOS Miller OTA in 130nm Technology

Afacan

2020

Sakarya University Journal of Science

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“…One of the most important analog building blocks in integrated systems is the operational transconductance amplifier (OTA). In recent years a number of deep sub 0.5-V OTAs have been shown in the literature [2], [4], [6]- [8]. It is worth mentioning, that the presented OTAs usually show moderate value of the DC open-loop voltage gain.…”

Section: Introductionmentioning

confidence: 96%

“…as well as smaller g mb /g m ratios [2]. In order to overcome this issue, specific layout design techniques combined with a partial positive feedback [2], three-stage structures [4], [8] or other gain-boosting techniques can be used [6]. Nevertheless, despite special design approaches, the achieved voltage gains in most cases are rather moderate, ranging from 43 dB [4] to 70 dB [8].…”

Section: Introductionmentioning

confidence: 99%

“…Nevertheless, despite special design approaches, the achieved voltage gains in most cases are rather moderate, ranging from 43 dB [4] to 70 dB [8]. Only in some cases a slightly larger voltage gain, exceeding 70 dB, can be achieved, using partial positive feedback or auxiliary current-mode amplifiers [6], but at the cost of a reduced gain-bandwidth product (GBW) and slew-rate (SR).…”

Section: Introductionmentioning

confidence: 99%

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A 0.3-V 98-dB Rail-to-Rail OTA in $0.18~\mu$ m CMOS

Kulej

Khateb

2020

IEEE Access

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A new solution for an ultra-low-voltage, ultra-low-power operational transconductance amplifier (OTA) is presented in the paper. The design exploits a three-stage structure with a Reversed Miller Compensation Scheme, where the input stage is based on a non-tailed bulk-driven differential pair. Optimization of the structure for very low supply voltage is discussed. The resulting amplifier outperforms other ultra-low-voltage OTAs in terms of a DC voltage gain and power efficiency, expressed by standard figures of merit. Experimental verification using a 0.18 µm CMOS technology, with supply voltage of 0.3-V, showed a dissipation power of 13 nW, a DC voltage gain of 98 dB, a gain-bandwidth product of 3.1 kHz and an average slew-rate of 9.1 V/ms at 30 pF load capacitance. The experimental results agree well with simulations. INDEX TERMS Bulk-driven, operational transconductance amplifier, operational amplifier, low voltage, low power.

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“…It was first proposed and described in detail in Kulej and Blakiewicz 2 . Next, it was used as a part of class AB output stage and validated experimentally in Kulej and Khateb 3 …”

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confidence: 99%

Design and implementation of sub 0.5‐V OTAs in 0.18‐μm CMOS

Cited by 81 publications

References 28 publications

Low Power-High Gain Bulk-Driven 3 Stages CMOS Miller OTA in 130nm Technology

Low Power-High Gain Bulk-Driven 3 Stages CMOS Miller OTA in 130nm Technology

A 0.3-V 98-dB Rail-to-Rail OTA in $0.18~\mu$ m CMOS

Comment on “A 0.3‐V, 2.4‐nW and 100‐Hz fourth‐order LPF for ECG signal processing”

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