Design and Implementation of Low Power Pipeline ADC

Bakhtar, S. I.; Dalu, S.S.

doi:10.1109/rice.2018.8509051

Cited by 4 publications

(1 citation statement)

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“…The thermal noise is one of the main noise for high speed sample and hold circuit. The noise density is: (11) Combination of the transfer function (9), the output noise is: In order to decrease the noise impact, to increase the , but the expression (10) shows that the increasing of sample capacitance will leads to a time limit in bandwidth. To ensure the bandwidth increase the size of switch transistor this reduces the conduction resistance [1].…”

Section: Fig 2 Typical Representation Of Sample and Hold Circuitmentioning

confidence: 99%

Design and Performance Evaluation of Ideal and Non-Ideal Effects of Pipeline ADC using Software Reference Models

B*¹,

Meshram²

2019

IJRTE

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Analog-to-digital converter (ADC) is one of the key component in any of the application oriented system design. This paper mainly focused on the simulation of various non-ideal parameters of an ADC as the number of resolution increases. The effect of non-ideal aspects like Jitter model and error block model are created in Matlab Simulink and the results are plotted. The dynamic non-ideal characteristics are discussed with their mathematical models and are compared with the equivalent resolution ADCs. The preliminary observations are also drawn according to the ideal characteristics. This shows that as the resolution increases, the bandwidth of non-ideal characteristics are also increases. This work is entitled to prove the non-idealities of 12-bit Pipeline ADC.

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Section: Fig 2 Typical Representation Of Sample and Hold Circuitmentioning

confidence: 99%