Design and Implementation of a Practical Digital PWM Controller

Leung, Ka; Alfano, D.

doi:10.1109/apec.2006.1620728

Cited by 17 publications

(4 citation statements)

References 3 publications

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“…For example, the SPI [35] and other similar protocols [14] are synchronous and require an additional dedicated clock signal. In contrast, asynchronous protocols like UART [11], [36] need to recover the clock on both sides.…”

Section: A Communication Protocol Requirementsmentioning

confidence: 99%

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Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters

Scharrer

Halton

Scanlan

et al. 2012

IEEE Trans. Circuits Syst. I

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Abstract-An efficient high-speed bi-directional data transmission scheme for isolated AC-DC and DC-DC switched mode power converters is presented. The bi-directional scheme supports fast, efficient and reliable transmission of digitally encoded data across the isolation barrier and enables primary side control, allowing effective start-up and a simple interface to system controllers. Another key feature is that the bi-directional communication is independent of coupler gain and degradation and only the minimum number of couplers is required. The digital interface can also be used to transmit auxiliary signals between both sides. For test purposes, the scheme has been implemented on FPGAs and verified using a custom-built SMPC board.

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Section: A Communication Protocol Requirementsmentioning

confidence: 99%

“…With reference to Fig. 1(a), secondary side control designs must pass the DPWM control signals from the secondary side to the primary side [11]. The main drawback with this approach is that the controller is not directly powered up during start-up operation and additional overhead circuitry on the primary side is normally required [12].…”

mentioning

confidence: 99%

Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters

Scharrer

Halton

Scanlan

et al. 2012

IEEE Trans. Circuits Syst. I

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“…Paper [1] presents the basic structure and the design methods of the digitally controlled DC-DC converter. Paper [2] gives designing and implementation of digitally controlled DC-DC converter based on 8051 CPU core. Paper [3], [4] studied quantization effects and no limit cycle conditions in digitally controlled DC-DC converters.…”

Section: Introductionmentioning

confidence: 99%

Timing scheme of floating-point based digital controller for DC-DC Converters

Wang

Zhang

2012

2012 IEEE International Symposium on Industrial Electronics

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This paper mainly proposes a timing scheme of a digitally controlled DC-DC converter, which is described in hardware description language (HDL) at the functional level. FPGA is adopted for the optimization of computation, sampling and modulation to get precise and fast dynamic response of DC-DC converters. The concept of this timing scheme is broad and includes DPWM scheme, sampling scheme and computation scheme. Computational accuracy of the scheme is guaranteed by floating-point arithmetic. At the same time, fast integer-float and float-integer converters are developed based on look-up tables and real-time computation which can greatly reduce the duty pulse width computation clock cycles. A specific sampling and PWM scheme are designed to eliminate compensator delay caused by sampling and hold and the computation process. High precision digital pulse-width modulator based on second-order sigma-delta concept (Σ-ΔDPWM) and dual-mode compensator method are implemented to eliminate steady Limit-Cycle and to maintain fast dynamic response as well. This design is made for IC design verification to practically used digital DC-DC converters.

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“…The time it takes to complete the algorithm could be reduced further by using a parallel implementation of the PID compensator as proposed in ref. [13]. A parallel implementation does on the other hand increase the complexity and price of the digital control solution and in most cases it will not be necessary to run at very high sampling frequencies.…”

Section: Digital Controller Implemented In a Hybrid Fpga/cpldmentioning

confidence: 99%

Digitally controlled point of load converter with very fast transient response

Jakobsen

Andersen

2007

2007 European Conference on Power Electronics and Applications

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This paper presents a new Digital Self-Oscillating Modulator (DiSOM) that allows the duty cycle to be changed instantly. The DiSOM modulator is shown to have variable switching that is a function of the duty cycle. Compared to a more traditional digital PWM modulator based on a counter and comparator the DiSOM modulator allows the sampling frequency of the output voltage control loop to be higher than the switching frequency of the power converter, typically a DC/DC converter. The features of the DiSOM modulator makes it possible to design a digitally controlled DC/DC converter with linear voltage mode control and very fast transient response. The DiSOM modulator is combined with a digital PID compensator algorithm is implemented in a hybrid CPLD/FPGA and is used to control a synchronous Buck converter, which is used in typical Point of Load applications. The computational time is only three clock cycles from the time the A/D converter result is read by the control algorithm to the time the duty cycle command is updated. A typical POL converter has been built and the experimental results show that the transient response of the converter is very fast. The output voltage overshoot is only 2.5% of the nominal output voltage when a load step of 50% -100% of nominal output current is applied to the converter. The settling time is approximately 8 PWM cycles.

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Design and Implementation of a Practical Digital PWM Controller

Cited by 17 publications

References 3 publications

Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters

Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters

Timing scheme of floating-point based digital controller for DC-DC Converters

Digitally controlled point of load converter with very fast transient response

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