2008 IEEE International Multitopic Conference 2008
DOI: 10.1109/inmic.2008.4777797
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Design and implementation of a 2-level sinusoidal PWM generator with modulation based harmonic elimination

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“…The authors propose the storage by lookup tables of the sinusoidal signals generated for the modulation waveforms. [20] uses systemC and a Xilinx Spartan 3E FPGA for the design of a PWM with harmonic reduction. Following this same line of harmonic reduction, in [21] another FPGAbased random modulation technique for DC/DC converter is presented.…”
Section: Related Workmentioning
confidence: 99%
“…The authors propose the storage by lookup tables of the sinusoidal signals generated for the modulation waveforms. [20] uses systemC and a Xilinx Spartan 3E FPGA for the design of a PWM with harmonic reduction. Following this same line of harmonic reduction, in [21] another FPGAbased random modulation technique for DC/DC converter is presented.…”
Section: Related Workmentioning
confidence: 99%