Design and analysis of target-sensitive real-time systems

Abstract

A significant number of real-time control applications include computational activities where the results have to be delivered at precise instants, rather than within a deadline. The performance of such systems significantly degrades if outputs are generated before or after the desired target time. This work presents a general methodology that can be used to design and analyze target-sensitive applications in which the timing parameters of the computational activities are tightly coupled with the physical characteristics of the system to be controlled. For the sake of clarity, the proposed methodology is illustrated through a sample case study used to show how to derive and verify real-time constraints from the mission requirements. Software implementation issues necessary to map the computational activities into tasks running on a real-time kernel are also discussed to identify the kernel mechanisms necessary to enforce timing constraints and analyze the feasibility of the application. A set of experiments are finally presented with the purpose of validating the proposed methodology

Wi-Fi Channel Bonding: An All-Channel System and Experimental Study From Urban Hotspots to a Sold-Out Stadium

“…Likewise, one could envision a system comprising 24 off-the shelf Wi-Fi cards as sniffers, one per basic channel. Unfortunately, such a system would be quite unwieldy and would introduce a challenge of ensuring synchronicity among wireless cards: restricting the delay between channel measurements to the order of nano/microseconds is unfeasible due to the hardware interrupt latency and jitter from the different peripherals [39], [40].…”

Wi-Fi All-Channel Analyzer

“…Likewise, one could envision a system comprising 24 off-the shelf Wi-Fi cards as sniffers, one per basic channel. Unfortunately, such a system would be quite unwieldy and would introduce a challenge of ensuring synchronicity among wireless cards: restricting the delay between channel measurements to the order of nano/microseconds is unfeasible due to the hardware interrupt latency and jitter from the different peripherals [30,31].…”