Design and Analysis of Robust Tunneling FET SRAM

Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi‐Ho; Su, Pin; Chuang, Ching-Te

doi:10.1109/ted.2013.2239297

Cited by 40 publications

(17 citation statements)

References 12 publications

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“…Outward access transistors can be used in 6T SRAM cell in case the architecture allows both BL and BLB lines to be clamped at 0V instead of the supply voltage VDD during hold operation. Various alternative implementations of TFET based SRAM cell had been proposed which includes: 8T transmission gate-based SRAM cell, Schmitt trigger-based SRAM [20], 7T TFET SRAM cell, 7T Driver Less TFET SRAM [21]. Successful demonstration of TFET-MOSFET based SRAM cell that makes use of write assist technique has been presented in [22].…”

Section: Tfet Based Sram Cell Designmentioning

confidence: 99%

Design and Analysis of Gate All Around Tunnel FET based SRAM

Dutta¹,

Soni²,

Pattanaik³

2019

IJITEE

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Tunnel FETs (TFETs) possess all required characteristics for replacing MOSFET device in circuits with stringent requirements particularly for Internet of Things (IoT) and Biomedical applications. In particular Gate-All-Around (GAA) TFET device configuration exhibits higher ION/IOFF ratio and strong control of the gate terminal over the channel. The main objective of this research work is to explore the prospects of using GAATFET device topology for designing low power and reliable SRAM cell. In this work both n-type and p-type Tunnel FET devices have been designed and simulated using Cogenda Visual TCAD tool. Verilog-A model relying on look up tables that are extracted through device simulations has been designed for performing circuit simulations of 6T and 8T SRAM cell involving these novel devices. Device simulation results show that both NTFET and PTFET devices exhibits excellent ION/IOFF ratio and steep subthreshold slope. NTFET device simulation results show 21.2 mV/decade of subthreshold slope and ION/IOFF ratio of 1013. PTFET device has ON current of the similar order as that of NTFET and has extremely low value of OFF current of less than 1 pA. Circuit simulation results show that by using optimized sizing of transistors in outward NTFET access transistor based 6T SRAM cell leads to reliable and fast read and write operation with acceptable values of noise margin. 6T TFET based SRAM cell achieves leakage power reduction by 77.5% in comparison to leakage power consumed by 8T TFET based SRAM thereby making it a favorable choice for memory design.

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Section: Tfet Based Sram Cell Designmentioning

confidence: 99%

Design and Analysis of Gate All Around Tunnel FET based SRAM

Dutta¹,

Soni²,

Pattanaik³

2019

IJITEE

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“…Therefore, modified SRAM architectures have been proposed to overcome the unidirectionality issue: asymmetric 6T cell with one I-AT and one O-AT and write-assist technique (WA) [9], 7T cell with O-ATs and one additional transistor for the read [10], 6T cell with p-type I-AT and read-assist (RA) [11], 8T and 10T Schmitt-Trigger cells [12], [13], a 7T driver-less (DL) cell [14] and a 8T hybrid TFET/CMOS cell [15].…”

Section: B Sram Cell Descriptionmentioning

confidence: 99%

“…As a result, the write and read operations are effectively decoupled leading to a robust solution to the unidirectional I D issue. The 8T cell has been employed in other works as a reference topology to benchmark more innovative schemes [14], [15].…”

Section: B Sram Cell Descriptionmentioning

confidence: 99%

Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells

Strangio

Palestri

Esseni

et al. 2015

IEEE J. Electron Devices Soc.

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We use mixed device-circuit simulations to predict the performance of 6T static RAM (SRAM)\ud cells implemented with tunnel-FETs (TFETs). Idealized template devices are used to assess the impact of\ud device unidirectionality, which is inherent to TFETs and identify the most promising configuration for the\ud access transistors. The same template devices are used to investigate the VDD range, where TFETs may be\ud advantageous compared to conventional CMOS. The impact of device ambipolarity on SRAM operation\ud is also analyzed. Realistic device templates extracted from experimental data of fabricated state-of-the-art\ud silicon pTFET are then used to estimate the performance gap between the simulation of idealized TFETs\ud and the best experimental implementations

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“…Because the access transistors requirement of SRAM to conduct current in both directions. For SRAM cells, unidirectional characteristics severely impact robustness [11].…”

Section: Tunnel Field Effect Transistormentioning

confidence: 99%

Analysis of Double Gate Tunneling FET characteristics for low power designs Suppression

2015

2nd International Conference on Innovative Engineering Technologies (ICIET'2015) August 7-8, 2015 Bangkok (Thailand)

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The continuous down-scaling of MOSFETs gives faster and more complex chip design. As the devices scale down, supply voltage should be decreased accordingly. However the reduction in power consumption of MOSFETs is becoming increasingly difficult. The reduction of MOSFET size causes high sub-threshold swing, leakage current (I off ) and short channel effect. In this paper Tunnel FET (TFET) is studied as alternative device which could overcome physical limits of MOSTETs. TFET is simply a gated p-i-n diode. TFET works on the principle of band to band tunnelling. TFETs do not suffer from short channel effect and it has small sub-threshold swing and low off current. This paper introduces and summarizes progress in the development of the tunnel field-effect transistors relative to the metal-oxidesemiconductor field-effect transistor, design trade-offs, and fundamental challenges.

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Design and Analysis of Robust Tunneling FET SRAM

Cited by 40 publications

References 12 publications

Design and Analysis of Gate All Around Tunnel FET based SRAM

Design and Analysis of Gate All Around Tunnel FET based SRAM

Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells

Analysis of Double Gate Tunneling FET characteristics for low power designs Suppression

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