Design and Analysis of 1-Bit SRAM

Abstract

SRAM (Static Random-Access Memory) is a memory component and is used in various VLSI chips due to its unique capability to retain data. This memory cell has become a subject of research to meet the demands for future digital electronics and communication systems. SRAM is a major data storage device due to its large storage density, less time to access and consumes less power. It does not require refreshing periodically which makes it the most popular memory cell among VLSI designers. Hence continuous work is going on for the better performance of SRAM cells. In this paper 6T SRAM cell circuit is designed for 1-Bit storage. The design is synthesized using the LTspice software tool and the analysis of important memory parameters like read access time, write access time, power and number of transistors is performed.