Dependence of polycrystalline silicon thin-film transistor characteristics on the grain-boundary location

Kimura, Mutsumi; Inoue, Satoshi; Shimoda, Tatsuya; Eguchi, Tsukasa

doi:10.1063/1.1329141

Cited by 62 publications

(33 citation statements)

References 24 publications

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“…By considering HC induced defect generation locally at the drain side, nearly constant I dsat in the normal mode is the result of penetration of the trap potential barrier through drain induced barrier lowering (DIBL) effect [7], however, at an increasingly larger V dsat with stress time. In the reverse mode, Fig.2a, HC injection also reduces local drain field thus suppresses I k in the normal mode.…”

Section: Hc Degradationmentioning

confidence: 99%

Comparison of device degradation of n-type metal-induced laterally crystallized poly-Si TFTs with or without hydrogenation

Wang

Zhou

et al. 2009

2009 IEEE International Reliability Physics Symposium

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Hydrogenation effect on reliability of n-type metalinduced laterally crystallized poly-Si TFTs is systematically evaluated by comparing device transfer and output characteristic degradation under both hot carrier (HC) and self-heating (SH) stresses. Under HC stress, hydrogenated device exhibits better stability in transfer characteristics, but worse stability in output characteristics. Under SH stress, hydrogenation leads to instability in both transfer and output characteristics. Under both stresses, very different degradation behaviors associated with hydrogenation are found, reflecting different degradation mechanism involved for hydrogenated devices.

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Section: Hc Degradationmentioning

confidence: 99%

Comparison of device degradation of n-type metal-induced laterally crystallized poly-Si TFTs with or without hydrogenation

Wang

Zhou

et al. 2009

2009 IEEE International Reliability Physics Symposium

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“…[8][9][10][11] However, in these studies the GB positional dependence of the output characteristics of the TFT was not thoroughly investigated. Furthermore, only TFTs with channel lengths equal to or greater than one micron were studied.…”

Section: Introductionmentioning

confidence: 99%

Simulation Study of the Dependence of Submicron Polysilicon Thin-Film Transistor Output Characteristics on Grain Boundary Position

Walker

Uno

Mizuta

2005

Jpn. J. Appl. Phys.

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We investigate the impact of varying the grain boundary (GB) position on the output (I d -V d ) characteristics of submicron single GB polysilicon thin film transistors (TFTs), by two-dimensional (2D), drift-diffusion based, device simulation. We employ a localized GB trapping model with a distribution of both donor-like and acceptor-like trap states over the forbidden energy gap of the GB region. We show that for devices with channel lengths in the deep submicron regime, significant variations in output conductance (g d ) occur as the GB position is varied. Specifically, we find that output conductance increases as the GB approaches the drain edge. Furthermore, the sensitivity of output conductance to the GB position increases as channel length decreases. The findings have important implications for any future analogue three-dimensional (3D) IC design that uses polysilicon as a device material.

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“…The kink effect of poly-si TFTs in terms of the function of the PBT is studied [1] [2]. The influence of the grain boundary (GB) [3] [4] and the effects of traps at GB have been investigated [5] [6]. Bias-dependent current gain of PBT in the poly-si TFTs is studied [7].…”

Section: Introductionmentioning

confidence: 99%

Channel length-dependent parasitic bipolar transistor effect in Poly-Si TFTs considering traps at grain boundary

Liu

Kuo

Zhang

2012

2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology

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This paper reports channel length-dependent parasitic bipolar transistor (PBT) effect in Poly-Si TFTs considering traps at grain boundary. As verified by the experimentally measured data and simulation results, due to impact ionization (II), the PBT's current gain is large when the channel length is small at a low drain bias; but independent of the channel length at a high drain bias. The trap density at grain boundary affects strongly the channel length-dependent floating-body effect of the poly-si TFTs.

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Dependence of polycrystalline silicon thin-film transistor characteristics on the grain-boundary location

Cited by 62 publications

References 24 publications

Comparison of device degradation of n-type metal-induced laterally crystallized poly-Si TFTs with or without hydrogenation

Comparison of device degradation of n-type metal-induced laterally crystallized poly-Si TFTs with or without hydrogenation

Simulation Study of the Dependence of Submicron Polysilicon Thin-Film Transistor Output Characteristics on Grain Boundary Position

Channel length-dependent parasitic bipolar transistor effect in Poly-Si TFTs considering traps at grain boundary

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