Demonstration of a Fourth-Order Pole-Zero Optical Filter Integrated Using CMOS Processes

Rasras, Mahmoud; Gill, Douglas M.; Patel, Sanjay; Tu, Kun-Yii; Chen, Young-Kai; White, Alice E.; Pomerene, Andrew; Carothers, Daniel; Grove, Michael; Sparacin, Daniel K.; Michel, Jürgen; Beals, Mark; Kimerling, L.C.

doi:10.1109/jlt.2006.888932

Cited by 89 publications

(41 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The circuits are typically fabricated on silicon-on-insulator (SOI) substrates with a 200-400 nm thick top silicon layer and a 1-2 µm thick SiO 2 buried oxide layer. In most cases e-beam lithography is used for the definition of the structures, but the use of DUV-lithography has also been demonstrated [1,[5][6][7]. The latter is compatible with standard processes used for the fabrication of the most advanced electronic circuits and allows for mass-manufacturing.…”

Section: Introductionmentioning

confidence: 99%

Coupling mechanisms for a heterogeneous silicon nanowire platform

Thourhout¹,

Roelkens²,

Baets³

et al. 2008

Semicond. Sci. Technol.

View full text Add to dashboard Cite

show abstract

Section: Introductionmentioning

confidence: 99%

Coupling mechanisms for a heterogeneous silicon nanowire platform

Thourhout¹,

Roelkens²,

Baets³

et al. 2008

Semicond. Sci. Technol.

View full text Add to dashboard Cite

show abstract

“…In the past decade, a number of groups have made significant contributions to the study of integrated optical Using silicon waveguides, Rasras et al [98] demonstrated processor chips comprising a particular RAMZI circuit as shown in Figure 21 and their use for implementing bandpass and notch types of RF filters. The processor chips feature a waveguide propagation loss of 0.25 dB/cm and a filter bandwidth smaller than 1 GHz for an FSR of 13.5 GHz.…”

Section: Various Filter Implementationsmentioning

confidence: 99%

Programmable optical processor chips: toward photonic RF filters with DSP-level flexibility and MHz-band selectivity

et al. 2017

View full text Add to dashboard Cite

Integrated optical signal processors have been identified as a powerful engine for optical processing of microwave signals. They enable wideband and stable signal processing operations on miniaturized chips with ultimate control precision. As a promising application, such processors enables photonic implementations of reconfigurable radio frequency (RF) filters with wide design flexibility, large bandwidth, and high-frequency selectivity. This is a key technology for photonic-assisted RF front ends that opens a path to overcoming the bandwidth limitation of current digital electronics. Here, the recent progress of integrated optical signal processors for implementing such RF filters is reviewed. We highlight the use of a low-loss, high-index-contrast stoichiometric silicon nitride waveguide which promises to serve as a practical material platform for realizing high-performance optical signal processors and points toward photonic RF filters with digital signal processing (DSP)-level flexibility, hundreds-GHz bandwidth, MHz-band frequency selectivity, and full system integration on a chip scale.

show abstract

“…[17][18][19][20][21][22][23] What potential showstoppers exist? Six issues have been identified as necessary for a complete ULSI silicon microphotonic CMOS technology: i) neutralization of refractive index sensitivity to temperature fluctuations though the thermo-optic effect [24,25]; ii) achieving dimensional precision required for optical components [26]; iii) active Ge devices within the interconnect stack without an epitaxial growth template [27]; iv) computer aided design and simulation of electronic-photonic circuits [28,29,30]; iv) chiplevel photonic test; and v) scalable electronic-photonic packaging. Research solutions have been achieved for each issue, and proof of implementation at the required cost and performance points are the roadmap.…”

Section: The Roadmap For Monolithic Silicon Microphotonicsmentioning

confidence: 99%

Monolithic Microphotonic Integration on the Silicon Platform

Kimerling

Michel

2011

ECS Trans.

Self Cite

View full text Add to dashboard Cite

Photonic integration in ULSI electronic circuits contributes three new functionalities that are critical to performance scaling: i) power efficient, global interconnection, ii) high bandwidth density chip-chip communication, and iii) optical signal processing. With the transition to parallel chip architectures, efficient communication among processing nodes can become a limiting factor to both programming and performance. A photonic communication layer can provide distance independent, low latency interconnection with efficient broadcast capability. On-chip photonic signal channels can provide wavelength division multiplexed, photonic pins with >100x improvement in I/O bandwidth density over ball grid arrays. Monolithic integration of these capabilities in the CMOS process flow can be achieved with Ge active devices (photodetectors, modulators, lasers) and Si/SiON passive components (waveguides, resonators, couplers). Process integration can be achieved with both FEOL and BEOL strategies. Scaling Information Technology: Energy, Bandwidth, and CostInformation Technology (IT), enabled by ULSI silicon, has produced exponential increases in communication capacity (bits/second) and computation performance (operations-per-second) at constant cost. Internet traffic is increasing today at a pace of 40%/year and computation performance follows a Moore's Law pace of 100x/decade at the chip level and a faster 1000x/decade at the system level (facilitated by increased parallelism in system architecture). These paced advances, heralded as The Information Age, have been enabled by an integrated CMOS hardware platform that has delivered required improvements in power efficiency, performance and cost by dimensional scaling. Today the challenges of energy consumption and communication bandwidth call for a new scaling paradigm based on the integration of photonic functionality in CMOS. This paper is written as a guide to the technology and implementation strategies for photonic integration with ULSI electronics. It bridges CMOS and fiber optic technologies to attract a community to this new chip platform. [1,2,3] While the demand for increasing IT performance seems secure, the path for delivering that performance has encountered several significant barriers. The projected energy consumption by Information Technology has become an unsustainable fraction of the world electrical power generation. Server farms require >100MW of power; the IP switching to route Internet messages consumes ~10TWhr/year/telecom-carrier; servers, IP-traffic and peripherals use, in aggregate, ~5% of national electricity generation with predictions of >100% by 2020.The bandwidth barrier to scaling is evident in the information processing guideline (Amdahl's Law) of one Byte of communication for

show abstract

Demonstration of a Fourth-Order Pole-Zero Optical Filter Integrated Using CMOS Processes

Cited by 89 publications

References 11 publications

Coupling mechanisms for a heterogeneous silicon nanowire platform

Coupling mechanisms for a heterogeneous silicon nanowire platform

Programmable optical processor chips: toward photonic RF filters with DSP-level flexibility and MHz-band selectivity

Monolithic Microphotonic Integration on the Silicon Platform

Contact Info

Product

Resources

About