Demand-based block-level address mapping in large-scale NAND flash storage systems

Qin, Zhiwei; Wang, Yi; Liu, Duo; Shao, Zili

doi:10.1145/1878961.1878991

Cited by 55 publications

(20 citation statements)

References 18 publications

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“…The second-level exploits the spatial locality in workloads since neighbouring logical addresses in a same translation page are likely to be accessed. DAC [13] is similar to CDFTL but works at blocklevel for large-scale flash storage systems.…”

Section: B Ram Managementmentioning

confidence: 99%

“…In following, we shall describe TreeFTL based on page-level address mapping. However, the basic idea of TreeFTL can be easily adopted to a block-level mapping scheme like DAC [13].…”

Section: B Ram Managementmentioning

confidence: 99%

“…Block mapping suffers from its coarse granularity since out-ofplace updating prevents data from being put into other pages freely in a block. With the increase of flash capacity, the table for block-level mapping also goes bigger, and demand-based mechanisms are needed to lower RAM requirement [13].…”

Section: Introductionmentioning

confidence: 99%

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TreeFTL: Efficient RAM Management for High Performance of NAND Flash-based Storage Systems

Wang¹,

Wong²

2013

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2013

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Abstract-NAND flash memory is widely used for secondary storage today. The flash translation layer (FTL) is the embedded software that is responsible for managing and operating in flash storage system. One important module of the FTL performs RAM management. It is well-known to have a significant impact on flash storage system's performance. This paper proposes an efficient RAM management scheme called TreeFTL. As the name suggests, TreeFTL organizes address translation pages and data pages in RAM in a tree structure, through which it dynamically adapts to workloads by adjusting the partitions for address mapping and data buffering. TreeFTL also employs a lightweight mechanism to implement the least recently used (LRU) algorithm for RAM cache evictions. Experiments show that compared to the two latest schemes for RAM management in flash storage system, TreeFTL can reduce service time by 46.6% and 49.0% on average, respectively, with a 64MB RAM cache.

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Section: B Ram Managementmentioning

confidence: 99%

“…In following, we shall describe TreeFTL based on page-level address mapping. However, the basic idea of TreeFTL can be easily adopted to a block-level mapping scheme like DAC [13].…”

Section: B Ram Managementmentioning

confidence: 99%

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TreeFTL: Efficient RAM Management for High Performance of NAND Flash-based Storage Systems

Wang¹,

Wong²

2013

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2013

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“…Write requests to a page will cause block-level copying because of out-of-place updating. Recently, an improved block mapping scheme, DAC [21], was proposed. It is similar to DFTL, and caches mapping entries and pages on-demand in RAM in two levels.…”

Section: H Impact Of Early Reuse Of Log Blocksmentioning

confidence: 99%

ADAPT: Efficient workload-sensitive flash management based on adaptation, prediction and aggregation

Wang

Wong

2012

012 IEEE 28th Symposium on Mass Storage Systems and Technologies (MSST)

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Abstract-Solid-state drives (SSDs) made of flash memory are widely utilized in enterprise servers nowadays. Internally, the management of flash memory resources is done by an embedded software known as the flash translation layer (FTL). One important function of the FTL is to map logical addresses issued by the operating system into physical flash addresses. The efficiency of this address mapping in the FTL directly impacts the performance of SSDs. In this paper, we propose a hybrid mapping FTL scheme, called Aggregated Data movement Augmenting Predictive Transfers (ADAPT). ADAPT observes access behaviors online to handle both sequential and random write requests efficiently. It also takes advantage of locality revealed in the history of recent accesses to avoid unnecessary data movements in the required merge process. More importantly, by these mechanisms, ADAPT can adapt to various workloads to achieve good performance. Experimental results show that ADAPT is as much as 35.4%, 44.2% and 23.5% faster than a state-of-the-art hybrid mapping scheme, a prevalent pagebased mapping scheme, and a latest workload-adaptive mapping scheme, respectively, with a small increase in space requirement.

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“…Kim et al [20] term these blocks as "map blocks", and Gupta et al [29] and Qin et al [30] term these blocks as "translation blocks". The mapping information (pairs of logical and physical addresses) is recorded to the unused sectors of the map block.…”

Section: Block-level Managementmentioning

confidence: 99%

FTL algorithms for NAND-type flash memories

Kwon¹,

Ranjitkar²,

Ko³

et al. 2011

Des Autom Embed Syst

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Flash memory is being rapidly deployed as data storage for embedded devices such as PDAs, MP3 players, mobile phones and digital cameras due to its low electronic power, non-volatile storage, high performance, physical stability and portability. The most prominent characteristic of flash memory is that prewritten data can only be dynamically updated via the time consuming erase operation. Furthermore, every block in flash memory has a limited program/erase cycle. In order to manage these issues, the flash memory controller can be integrated with a software module called the flash translation layer (FTL). This paper surveys the state-of-art FTL algorithms. The FTL algorithms can be classified by the complexity of the algorithms: basic and advance. Furthermore, they can be classified by their corresponding tasks: performance enhancement and durability enhancement. The FTL algorithms corresponding to each classification are further broken down into various schemes depending on the methods they adopt. This paper also provides the information of hardware features of flash memory for FTL programmers.

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Demand-based block-level address mapping in large-scale NAND flash storage systems

Cited by 55 publications

References 18 publications

TreeFTL: Efficient RAM Management for High Performance of NAND Flash-based Storage Systems

TreeFTL: Efficient RAM Management for High Performance of NAND Flash-based Storage Systems

ADAPT: Efficient workload-sensitive flash management based on adaptation, prediction and aggregation

FTL algorithms for NAND-type flash memories

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