2014 IEEE International Symposium on Circuits and Systems (ISCAS) 2014
DOI: 10.1109/iscas.2014.6865698
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Delay-line temperature sensors and VLSI thermal management demonstrated on a 60nm FPGA

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Cited by 13 publications
(3 citation statements)
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“…The principal block of this circuitry is tapped delay line and ring oscillator made up of inverters. This utilizes less resources as compared to [11]. The PPG generates pulses of 43.92ns, 83.77ns, 127.9ns, and 157.1ns based on selection at room temperature.…”
Section: A Programmable Pulse Generator (Ppg)mentioning
confidence: 99%
“…The principal block of this circuitry is tapped delay line and ring oscillator made up of inverters. This utilizes less resources as compared to [11]. The PPG generates pulses of 43.92ns, 83.77ns, 127.9ns, and 157.1ns based on selection at room temperature.…”
Section: A Programmable Pulse Generator (Ppg)mentioning
confidence: 99%
“…8 was introduced in our past paper [1]. In this architecture, the frequency of the RO is not directly measured unlike [2,11]. The signal from the RO is detected and synchronized by a rising-edge detector, rather than directly sent to the counter.…”
Section: Synchronous Ring Oscillator Architecture (Sro)mentioning
confidence: 99%
“…Among the dynamical systems, systems with a time delay are an important category. Time delays appear in different practical systems, such as biological systems (Yüzbaş and Sezer, 2015), economical systems (Ellis and Christofides, 2015), thermal systems (Xie and Ng, 2014), chemical processes (Hashemi et al, 2016) and robotic systems (Cho et al, 2016). In many cases, delay is a source of instability and poor performance.…”
Section: Introductionmentioning
confidence: 99%