2022 IEEE International Reliability Physics Symposium (IRPS) 2022
DOI: 10.1109/irps48227.2022.9764473
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Defects in 4H-SiC epilayers affecting device yield and reliability

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Cited by 6 publications
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“…The primary sources of BPDs include (1) BPDs originating from the substrate that propagate into the drift region; (2) BPDs formed in the epitaxial layer (i.e., the drift region) during epitaxial growth; (3) BPD clusters formed due to inclusions (SiC down-fall); (4) small and tight BPD clusters formed around micropipes; (5) BPDs formed near the implanted region after P-type implantation and activation annealing [34]. A series of process improvements have been made, such as introducing a recombination-enhanced buffer layer between the substrate and the drift region, a KOH etching process before the conventional epitaxial growth to create BPD etch pits for enhancing the conversion of BPDs to threading edge dislocations (TEDs), and using ultraviolet photoluminescence (UVPL) on wafers to screen out dies with BPDs [37][38][39][40]. Stahlbush et al have demonstrated the high quality of commercial SiC wafers with an epi-layer thickness of 10 µm suitable for the 1.2 kV rating, and some vendors have achieved a near-equivalent quality of SiC wafers for the 3.3 kV rating with a 30 µm epi-layer thickness [34].…”
Section: Discussionmentioning
confidence: 99%
“…The primary sources of BPDs include (1) BPDs originating from the substrate that propagate into the drift region; (2) BPDs formed in the epitaxial layer (i.e., the drift region) during epitaxial growth; (3) BPD clusters formed due to inclusions (SiC down-fall); (4) small and tight BPD clusters formed around micropipes; (5) BPDs formed near the implanted region after P-type implantation and activation annealing [34]. A series of process improvements have been made, such as introducing a recombination-enhanced buffer layer between the substrate and the drift region, a KOH etching process before the conventional epitaxial growth to create BPD etch pits for enhancing the conversion of BPDs to threading edge dislocations (TEDs), and using ultraviolet photoluminescence (UVPL) on wafers to screen out dies with BPDs [37][38][39][40]. Stahlbush et al have demonstrated the high quality of commercial SiC wafers with an epi-layer thickness of 10 µm suitable for the 1.2 kV rating, and some vendors have achieved a near-equivalent quality of SiC wafers for the 3.3 kV rating with a 30 µm epi-layer thickness [34].…”
Section: Discussionmentioning
confidence: 99%