Defect states on the surfaces of a P-type c-Si wafer and how they control the performance of a double heterojunction solar cell

Insights gained from computer modeling of heterojunction with instrinsic thin layer “HIT” solar cells

“…These parameters are then used to calculate the sensitivity of the solar cell performance to various controlling factors, compare the performances of HIT cells on P-or N-type c-Si substrates and to determine realistic efficiency limits of these two types of structures. Experimental results of front (with an amorphous/crystalline (a-c) heterojunction only on the side light enters the device) and double (with a-c heterojunctions at both sides of the c-Si wafer) HIT cells on P-type c-Si wafers, with a flat ITO front and aluminum back contacts, have been simulated using ASDMP in earlier papers [1,2]. These results are summarized in Table 1A.…”

“…Two types of BSF designs: (A) 23 nm P-aSi:H and (B) 4 nm P-a-SiC:H/19 nm p-a-Si:H, detailed in Ref. [2] are shown for the double HIT cells. The QE's of both structures have also been modeled [2].…”

“…[2] are shown for the double HIT cells. The QE's of both structures have also been modeled [2]. Table 1B compares the experimental solar cell output of front and double HIT cells on N-type c-Si wafers developed by Sanyo [3][4][5] to modeling.…”

“…In this article, we first use the electrical-optical model ''Amorphous Semiconductor Device Modeling Program (ASDMP)'', later extended to also model c-Si and HIT cells [1], to simulate the output characteristics of HIT's on P-c-Si [1][2] and N-c-Si [3][4][5] substrates. The parameters extracted from such simulation are then used to compare the relative performances of the two types of HIT structures.…”

Study of the interfacial properties of amorphous silicon/n‐type crystalline silicon heterojunction through static planar conductance measurements

“…Since the crystalline substrate is high quality silicon, and the amorphous layer is very thin, the performance of these structures is mainly determined by the band offset and the amount of defects at the interface [2].…”