Decrease-radix design principle for carrying/borrowing free multi-valued and application in ternary optical computer

Jing, Yan; Yi, Jin; Kai-zhong, Zuo

doi:10.1007/s11432-008-0140-z

Cited by 57 publications

(37 citation statements)

References 10 publications

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“…In other words, we can design and construct any kind of ternary logic unit in any section of the OP by configuring the 18 basic operators, as long as we have enough types of operators on hand. This is what we refer to as the re-configurability property of a TOC [8].…”

Section: Characteristics Of a Ternary Optical Processormentioning

confidence: 99%

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Principles and construction of MSD adder in ternary optical computer

Shen

Peng

et al. 2010

Sci. China Inf. Sci.

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The two remarkable features of ternary values and a massive unit with thousands bits of parallel computation will make the ternary optical computer (TOC) with modified signed-digit (MSD) adder more powerful and efficient than ever before for numerical calculations. Based on the decrease-radix design presented previously, a TOC can satisfy either a user requiring huge capacity for data calculations or one with a moderate amount of data, if it is equipped with a prepared adder. Furthermore, with the application of pipelined operations and the proposed data editing technique, the efficiency of the prepared adder can be greatly improved, so that each calculated result can be obtained almost within one clock cycle. It is hopeful that by employing a MSD adder, users will be able to enter a new dimension with the creation of a new multiplier, new divider, as well as new matrix operator in a TOC in the near future.With the current rapid increase in the complexity of computer architectures, the power consumption of large scale systems has risen prohibitively. Much attention has been focused on reducing the power consumption in different ways. One of the ways of solving the problem is to use of an optical computer with its special non-electron characteristics of high speed, parallelism, multi-valued, and low power consumption. Considering these properties, researchers have been focusing mainly on improving the operating speed [1-3] and enlarging the number of parallel bits in these computers [4][5][6], but have often neglected the problem of reducing the power consumption.A TOC prototype recently developed in our laboratory at Shanghai University is a typical optical computer with a huge number of data bits [6,7]. Based on the decrease-radix design proposed in 2008 [8], we can configure any number of bits as specific groups of tri-valued logic units at any time in the TOC. However, as thousands of bits exist in an adder, the ripple-carry technique is infeasible in a TOC because of the terrible carry delay. In addition, the look-ahead carry technique does not suit the construction of optical elements due to the high complexity of its tree type architecture. For these reasons, we proposed a new technique called the direct parallel carry channel (DPCC) aiming at accelerating the carry operation [9]. Unfortunately, this scheme has failed to be put into practice for various reasons.

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Section: Characteristics Of a Ternary Optical Processormentioning

confidence: 99%

“…Based on the decrease-radix design proposed in 2008 [8], we can configure any number of bits as specific groups of tri-valued logic units at any time in the TOC. However, as thousands of bits exist in an adder, the ripple-carry technique is infeasible in a TOC because of the terrible carry delay.…”

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confidence: 99%

Principles and construction of MSD adder in ternary optical computer

Shen

Peng

et al. 2010

Sci. China Inf. Sci.

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“…In 2000, Jin Yi et al proposed the concept of the ternary optical computer (TOC) and designed its structure [1] [2][3] [4]. TOC is one of various new type computers.…”

Section: Introductionmentioning

confidence: 99%

Simple Structured Data Initial SZG File's Generation Software Design and Implementation

Li¹,

Yi²

2017

Proceedings of the 3rd International Conference on Wireless Communication and Sensor Networks (WCSN 2016)

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Abstract-SZG file is a programming platform for users to use Ternary Optical Computer (TOC) in high-level language program. This paper proposes an initial SZG file, with an extension .SZG, generation technology for structured data. The technology proposed in the paper can implement some functions such as storing the initial SZG file, appending operands to a SZG file, adding data and modifying the initial SZG file in external memory continually. Therefore, in the process of using the technology, users do not need to understand the format of SZG file and the process that the computer system analyzing the SZG files. Furthermore, in application programs, TOC can parallel process large amounts of raw data in rapidly by using the SZG file. In this paper, an experiment of the initial SZG file of contains four simple structured data (SSD) were tested, and the experiment results confirmed the validity and correctness of the technique and software.

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“…Qian et al proposed a two-step MSD addition and subtraction algorithm based on binary logic arithmetic using electron-trapping device, and presented one-step digit-set-restricted modified signed-digit adder. 17,18 Jin et al proposed a principle of ternary optical computer (TOC), the decrease-radix design principle, and the reconfiguration principle and structure, [19][20][21] which laid a solid foundation to the system design of the application-oriented TOC. Now the TOC is configured at least one optical processor.…”

Section: Introductionmentioning

confidence: 99%

Principle and design of ternary optical accumulator implementing M-k-B addition

Shen

Jiang

et al. 2014

Opt. Eng

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Abstract. In this paper, we focus on the M-k -B addition of the form M þ B 1 þ B 2 þ : : : þ B k based on an optical approach, where M is a modified signed-digit number and B i 's are the binary numbers. We present three transforms C, P, and R and an algorithm of carry-free parallel addition of M and B. Based on these transforms, the accumulation computing M-k-B is proposed which indicates that it requires only 2k steps to complete the addition in parallel. Then, the optical structures for C, P, and R transforms as well as the adder realizing M þ B are designed. Moreover, a photoelectric implementation of the ternary optical adder to realize M-1-B structure using the reconfiguration method is presented. Additionally, an optical experiment for 2-bit M-2-B ternary adder is carried out to demonstrate the feasibility of M-k-B adder. The work indicates that the parallel carry-free addition in form M 0 þ B 1 þ B 2 þ : : : þ B k is easily completed.

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Decrease-radix design principle for carrying/borrowing free multi-valued and application in ternary optical computer

Cited by 57 publications

References 10 publications

Principles and construction of MSD adder in ternary optical computer

Principles and construction of MSD adder in ternary optical computer

Simple Structured Data Initial SZG File's Generation Software Design and Implementation

Principle and design of ternary optical accumulator implementing M-k-B addition

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