Decoupled Compressed Cache: Exploiting Spatial Locality for Energy Optimization

Sardashti, Somayeh; Wood, David А.

doi:10.1109/mm.2014.42

Cited by 37 publications

(97 citation statements)

References 8 publications

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“…There are also two well-known overheads of data compression: (1) compression/decompression overhead [2], [18] in terms of latency, energy, and area, and (2) complexity/cost to support variable data sizes [12], [20], [17], [22]. Both problems have solutions: e.g., Base-Delta-Immediate compression [18] provides a low-latency, low-energy hardware-based compression algorithm, and Decoupled Compressed Cache [20] provides a mechanism to manage data recompaction and fragmentation in compressed caches.…”

Section: Why Data Compression Can Be Energy-inefficientmentioning

confidence: 99%

“…One potential way of addressing multiple of the described constraints is to employ dedicated hardware-based data compression mechanisms (e.g., [27], [2], [7], [18], [4]) across various data links in the system. Compression exploits the high data redundancy observed in many modern applications [18], [20], [4], [26]. It can be used to improve both capacity (e.g., of caches, DRAM, non-volatile memories [27], [2], [7], [18], [4], [17], [22], [16], [26]) and bandwidth utilization (e.g., of on-chip and off-chip interconnects [8], [3], [24], [21], [17], [22], [26]).…”

Section: Introductionmentioning

confidence: 99%

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Toggle-Aware Compression for GPUs

Pekhimenko

Bolotin

O’Connor

et al. 2015

IEEE Comput. Arch. Lett.

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Abstract-Memory bandwidth compression can be an effective way to achieve higher system performance and energy efficiency in modern data-intensive applications by exploiting redundancy in data. Prior works studied various data compression techniques to improve both capacity (e.g., of caches and main memory) and bandwidth utilization (e.g., of the on-chip and off-chip interconnects). These works addressed two common shortcomings of compression: (i) compression/decompression overhead in terms of latency, energy, and area, and (ii) hardware complexity to support variable data size. In this paper, we make the new observation that there is another important problem related to data compression in the context of the communication energy efficiency: transferring compressed data leads to a substantial increase in the number of bit toggles (communication channel switchings from 0 to 1 or from 1 to 0). This, in turn, increases the dynamic energy consumed by on-chip and off-chip buses due to more frequent charging and discharging of the wires. Our results, for example, show that the bit toggle count increases by an average of 2.2× with some compression algorithms across 54 mobile GPU applications. We characterize and demonstrate this new problem across a wide variety of 221 GPU applications and six different compression algorithms. To mitigate the problem, we propose two new toggle-aware compression techniques: Energy Control and Metadata Consolidation. These techniques greatly reduce the bit toggle count impact of the six data compression algorithms we examine, while keeping most of their bandwidth reduction benefits.

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Section: Why Data Compression Can Be Energy-inefficientmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Toggle-Aware Compression for GPUs

Pekhimenko

Bolotin

O’Connor

et al. 2015

IEEE Comput. Arch. Lett.

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show abstract

“…Prior work has proposed different compression algorithms that tradeoff compression ratio (i.e., original size over compressed size) and decompression latency. We use the C-PACK+Z compression algorithm because it has been shown to have a good compression ratio with moderate decompression latency and hardware overheads [26] [31]. In general, SCC is largely independent of the compression algorithm in use.…”

Section: Compressed Cachingmentioning

confidence: 99%

“…The earliest compressed caches do not support variable compressed block sizes [25] [29] [16], allowing fast lookups with relatively low area overheads, but achieve lower compression effectiveness due to internal fragmentation. More recent designs [26] [1] [13] improve compression effectiveness using variable-size compressed blocks, but at the cost of extra metadata and indirection latency to locate a compressed block.…”

Section: Introductionmentioning

confidence: 99%

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Skewed Compressed Caches

Sardashti

Seznec

Wood

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

Self Cite

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Abstract-Cache compression seeks the benefits of a larger cache with the area and power of a smaller cache. Ideally, a compressed cache increases effective capacity by tightly compacting compressed blocks, has low tag and metadata overheads, and allows fast lookups. Previous compressed cache designs, however, fail to achieve all these goals.In this paper, we propose the Skewed Compressed Cache (SCC), a new hardware compressed cache that lowers overheads and increases performance. SCC tracks superblocks to reduce tag overhead, compacts blocks into a variable number of sub-blocks to reduce internal fragmentation, but retains a direct tag-data mapping to find blocks quickly and eliminate extra metadata (i.e., no backward pointers). SCC does this using novel sparse super-block tags and a skewed associative mapping that takes compressed size into account. In our experiments, SCC provides on average 8% (up to 22%) higher performance, and on average 6% (up to 20%) lower total energy, achieving the benefits of the recent Decoupled Compressed Cache [26] with a factor of 4 lower area overhead and lower design complexity.

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Hardware-Assisted Compression

Sayood¹,

Balkir²

2018

Encyclopedia of Big Data Technologies

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Decoupled Compressed Cache: Exploiting Spatial Locality for Energy Optimization

Cited by 37 publications

References 8 publications

Toggle-Aware Compression for GPUs

Toggle-Aware Compression for GPUs

Skewed Compressed Caches

Hardware-Assisted Compression

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