DC-SIMD : Dynamic communication for SIMD processors

Abstract

SIMD (single instruction multiple data)-type processors have been found very efficient in image processing applications, because their repetitive structure is able to exploit the huge amount of data-level parallelism in pixel-type operations, operating at a relatively low energy consumption rate. However, current SIMD architectures lack support for dynamic communication between processing elements, which is needed to efficiently map a set of non-linear algorithms. An architecture for dynamic communication support has been proposed, but this architecture needs large amounts of buffering to function properly. In this paper, three architectures supporting dynamic communication without the need of large amounts of buffering are presented, requiring 98% less buffer space. Cycle-true communication architecture simulators have been developed to accurately predict the performance of the different architectures. Simulations with several test algorithms have shown a performance improvement of up to 5x compared to a locally connected SIMDprocessor. Also, detailed area models have been developed, estimating the three proposed architectures to have an area overhead of 30-70% compared to a locally connected SIMD architecture (like the IMAP). When memory is taken into account as well, the overhead is estimated to be 13-28%.

A Low-Energy Wide SIMD Architecture with Explicit Datapath

“…Such networks scale extremely poorly, however, because of their complexity and long wires. A number of interesting solutions have been proposed for wide-SIMD in recent years, such as a modified crossbar [23], an X-RAM swizzle network [24], and dynamic communication for SIMDs [4]. Although these networks mitigate the problem somewhat, either they are optimized for only a very few specific applications (e.g., DC-SIMD [4] is mainly tuned for kernels such as lens distortion correction), or a large amount of additional hardware is required [23,24].…”