DC‐offset elimination method for grid synchronisation

Li, Yunlu; Wang, Dazhi; Ning, Yi; Hui, Nanmu

doi:10.1049/el.2016.4570

Cited by 22 publications

(9 citation statements)

References 10 publications

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“…However, using the delay component of the input signal will result in a constant offset error in the estimated phase. In [32], a approach for rejecting DC offset by DSC operator was proposed in the αβ-frame. This approach adopted the characteristics for filtering specific frequency components of the DSC operator to eliminate the frequency component of DC offset.…”

Section: Introductionmentioning

confidence: 99%

Design of a High Performance Phase-Locked Loop With DC Offset Rejection Capability Under Adverse Grid Condition

2020

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In the new energy grid-connected power generation system, accurately extracting the grid synchronization signals such as the frequency, phase and amplitude of the grid voltage is the basis for effective control. Aiming at the requirements for detecting grid synchronization signals under unbalanced, harmonics and DC offset voltage mixed conditions, a dual second-order complex coefficient filter with DC offset rejection capability (DSOCCF dc) is proposed, combining the approach of moving average filter (MAF), a novel hybrid filter in dq-frame is designed and on the basis of this design a new synchronous reference frame phase locked loop (SRF-PLL) design approach based on the hybrid filter is proposed. The proposed approach employs moving average filter (MAF) to block the high-frequency harmonics in the grid voltage, and uses DSOCCF dc to separate the fundamental frequency positive and negative sequence and reject DC offset. It can accurately extract the synchronization information of the grid fundamental frequency positive sequence. After simulation and experiment verification, it can be confirmed that the proposed PLL can quickly and accurately lock the properties of the grid voltage under adverse grid condition, and also have high detection accuracy and strong robustness to frequency fluctuations. INDEX TERMS Dual second-order complex coefficient filter (DSOCCF), harmonic, phase-locked loop (PLL), dc offset, moving average filter (MAF).

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Section: Introductionmentioning

confidence: 99%

Design of a High Performance Phase-Locked Loop With DC Offset Rejection Capability Under Adverse Grid Condition

2020

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“…Thus, fast detection of phase angle information is crucial for a good control over grid connected instruments. The state‐of‐the‐art single‐phase PLL algorithms are moving average filter (MAF)–PLL [2 ], delayed signal cancellation–PLL [3 ], enhanced PLL [4 ] and demodulation‐based PLL [5 ]. In general, PLL is a type‐2 control system adheres to a trade‐off in the steady‐state accuracy and the response time [6 ].…”

Section: Introductionmentioning

confidence: 99%

Modified non-adaptive bandpass filter based phase locked loop

Verma

Jarial

Rao

2020

Electronics Letters

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In this Letter, a demodulation based pre‐filtering technique is proposed for fast detection of the single‐phase grid variables. The estimation of grid voltage parameters is achieved through a Type‐I synchronous reference frame phase‐locked loop (PLL). The modified bandpass filter in the pre‐filtering stage ensure a better rejection of the DC‐offset and harmonics. Thus, the grid variables are estimated rapidly with the help of a simple proportional controller. Consequently, in‐loop filtering burden and the effort required to tune the PLL is minimal. However, steady errors are witnessed in the fundamental amplitude and the phase information which are mitigated by a curve fitting technique. Importantly, the proposed PLL scheme has improved the dynamic performance under off‐nominal frequency conditions with immunity against grid disturbances. The robustness of the proposed algorithm is experimentally verified vis‐à‐vis existing literature.

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“…In this Letter, our focus is on phase and frequency estimation for single-phase system. Some of the existing techniques for single-phase systems are: Kalman filter [7], adaptive observer [8], phase-locked loop (PLL) [9][10][11][12], enhanced PLL (EPLL) [13,14], adaptive filter-based frequency-locked loop (FLL) [15], and demodulation-based technique [16,17].…”

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confidence: 99%

“…PLL [9][10][11][12] is undoubtedly the most popular technique available in the literature. Many existing PLL results for single-phase system use the idea of synchronous reference frame-PLL (SRF-PLL) originally proposed for three-phase system.…”

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confidence: 99%

Demodulation type single‐phase PLL with DC offset rejection

Ahmed

Benbouzid

2020

Electron. lett.

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This Letter proposes demodulation type PLL for phase and frequency estimation of single-phase system that can reject DC offset. Using results from the adaptive estimation literature, this Letter proposes a linear parametric model-based initial phase angle estimation approach. Then by using differentiation and integration operation on the estimated initial phase angle, the frequency is estimated. This avoids the use of any low-pass filter unlike conventional demodulation-based technique. Moreover, unlike existing demodulation-based technique, the proposed technique can completely reject DC offset. Comparative experimental results, provided with state-of-the-art DC offset rejection-based enhanced phase locked-loop, clearly demonstrate the suitability of the proposed technique.

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DC‐offset elimination method for grid synchronisation

Cited by 22 publications

References 10 publications

Design of a High Performance Phase-Locked Loop With DC Offset Rejection Capability Under Adverse Grid Condition

Design of a High Performance Phase-Locked Loop With DC Offset Rejection Capability Under Adverse Grid Condition

Modified non-adaptive bandpass filter based phase locked loop

Demodulation type single‐phase PLL with DC offset rejection

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