Darlington Based 8T CNTFET SRAM Cells with Low Power and Enhanced Write Stability

Elangovan, M.; Karthickeyan, D.; Kumar, Mukesh; Ranjith, R.

doi:10.1007/s42341-021-00329-w

Cited by 8 publications

(2 citation statements)

References 22 publications

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“…6T), and three already proposed 8T cells, i.e. feedback cutting 8T (FBCUT8T), 35 read decoupled 8T (ReadDec8T), 36 Darlington transistors based 8T (Darlington8T), 59 SRAM cell (see Fig. 14).…”

Section: Blp8t Results Comparison With Other 8t Cells and Discussionmentioning

confidence: 99%

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A CNTFET Based Bit-Line Powered Stable SRAM Design for Low Power Applications

Sachdeva

Sharma

Gupta

et al. 2023

ECS J. Solid State Sci. Technol.

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Higher charge mobility, gate control, and better electrostatics are the key reasons that make a carbon nanotube field effect transistor (CNTFET) a better candidate as the successor of conventional complementary metal oxide semiconductor transistors. However, the increased charge mobility also enhances the leakage power. This work uses CNTFET for designing a low-power eight-transistor static random access memory (8T SRAM) cell. The leakage power of the proposed cell is reduced by 2.21× compared to conventional 6T SRAM at 0.3 V with similar CNTFET parameters. The read and write power delay product of the proposed design is improved by 1.02× and 1.85×, respectively. Moreover, the read/write/ hold static noise margin of the proposed cell is also enhanced by 1.98×/ 0.99×/ 1.01×, respectively, compared to the conventional 6T design. The proposed cell is also compared with three already proposed CNTFET based 8T SRAM designs. Cadence Virtuoso simulation tool and Stanford University 32 nm CNTFET verilog-A model file are used to achieve simulation results.

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Section: Blp8t Results Comparison With Other 8t Cells and Discussionmentioning

confidence: 99%

“…6b) for the reduction in leakage power. 59 In this cell, the ground of the core latch is replaced by two stacked transistors. This arrangement reduces leakage current and also reduces read static noise margin (RSNM) because the discharge of current via pull-down transistor will not be smooth during these operations.…”

Section: Review Of Cntfet Based Sram Cellsmentioning

confidence: 99%