Cu pillar bumps as a lead-free drop-in replacement for solder-bumped, flip-chip interconnects

Monitoring of thermo-mechanical stress via CMOS sensor array: Effects of warpage and tilt in flip chip thermo-compression bonding

“…While pressing, the sensor chip recorded force and temperature signals at each bump sensor location. Touchdowns were performed with forces low enough not to damage the bumps on the sensor pads but still with realistic TCB process conditions [1,4,5,18]. The temperature on the bond head was set up to 200°C, which is lower than typical process conditions with Pb free soldering.…”

“…The Au bumps on the pads (Fig. 5b) were used to simulate the Cu pillars found in real bonding conditions [1,5,9,18,19]. A 3 mm square Si die was then picked up by the bond head and used as a pressure plate to apply force and temperature (Fig.…”

“…TCB is similar to classical flip chip bonding, but uses copper pillars instead of solder balls. The most common chip sizes range from 10 mm × 10 mm with several hundred [1] or thousand [2][3][4][5] bumps to smaller chips with less than ten bumps for MEMS applications [6].…”

“…To further miniaturize microelectronics, interconnect technologies have been shifting towards advanced TCB methodologies [1][2][3][4][5][6]. TCB is similar to classical flip chip bonding, but uses copper pillars instead of solder balls.…”

Non-conductive film with Zn-nanoparticles (Zn-NCF) for 40μm pitch Cu-pillar/Sn–Ag bump interconnection

“…Due to tremendous effort of many research organizations and industries, state-of-art TSV forming and copper via filling can be successfully developed. As TSV vertical interconnection methods, Cu pillar/Sn-Ag bump structure is being widely investigated for 3D TSV chip stacking [2][3][4][5][6][7][8]. Recently, 40 lm pitch TSV-chip stacking is being applied in real products in IBM, Xillinx, Samsung, etc., however, there are two major problems in Cu pillar/ Sn-Ag bonding.…”