Cu-Cu Bonding Alternative to Solder based Micro-Bumping

Ruythooren, Wouter; Beltran, A. M.; Labie, Riet

doi:10.1109/eptc.2007.4469706

Cited by 23 publications

(9 citation statements)

References 3 publications

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“…The R t is reduced to less than 20 nm and an R a of less than 3 nm is achieved. It has been reported earlier [2], that the Cu-Cu bonding can be achieved at temperatures as low as 210ºC using flycutted bumps. An optical image of the flycutted bump is also shown at the bottom left.…”

Section: (A) Bump Flycuttingmentioning

confidence: 95%

“…al. [2], is to planarize the metal bumps to have a flat bonding surface as opposed to rough, as plated surface. In this work flycutting is performed on Cu and Sn solder bumps.…”

Section: (A) Bump Flycuttingmentioning

confidence: 99%

“…It is used to planarize metal bumps [1], [2], [3], polymers or polyimide. In the flycutting process, a diamond cutting bit moves over the wafer performing a milling type operation, removing all material it comes into contact with (Fig.…”

Section: Introductionmentioning

confidence: 99%

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Diamond bit cutting for processing high topography wafers

Agarwal

Pham

Cotrin

et al. 2009

2009 11th Electronics Packaging Technology Conference

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In this paper we report the results of diamond bit cutting on metals, such as Cu and Sn, polymers, temporary glue and polyimide. Diamond bit cutting is an attractive, fast and economically viable option when processing on high topography wafers is required, or when smooth surface finish is required. Diamond bit cutting can planarize the surface of the high topography features on which conventional IC processing steps can be performed with ease. IntroductionWith the new developments in 3D integration there is a high demand for processing wafers with high topography. Conventional IC processing steps like lithography, wafer bonding, deposition steps etc. show limited success on high topography samples. Chemical-mechanical polishing (CMP) is a method to planarize the surface of metal (damascene process); however CMP is not available as a technique to use in post-passivation processing in a packaging environment due to high cost.Diamond bit cutting, also referred as flycutting, is a very attractive option when processing on high topography wafers is required as it can planarize the surface of such high topography wafers, on which conventional IC processing steps can be performed with ease. It can also be used to planarize the surface of electroplated metal/solder bumps or bonding rings, which in turn will result in high yielding bonds.Flycutting is a rather new technique. It is used to planarize metal bumps [1], [2], [3], polymers or polyimide. In the flycutting process, a diamond cutting bit moves over the wafer performing a milling type operation, removing all material it comes into contact with (Fig. 1). The cutting bit is kept at a fixed distance from the chuck table, so, if the substrate is properly attached to the tool table (using vacuum in this case) and has itself only minimal thickness variations (~1 μm for silicon wafer, typically), the distance of the bit to the wafer surface is properly controlled. Fig. 1 shows the schematic of how flycutting planarizes the surface of a wafer with high topography. Usually metals like Cu, Sn and Au embedded in polymer are cut using this technique. The polymer can be easily removed after flycutting, if required.In this paper we present the results of flycutting on metals like Cu and Sn. We also present the flycutting results on high topography surfaces in the presence of polymers, temporary glue and polyimide.

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Section: (A) Bump Flycuttingmentioning

confidence: 95%

“…al. [2], is to planarize the metal bumps to have a flat bonding surface as opposed to rough, as plated surface. In this work flycutting is performed on Cu and Sn solder bumps.…”

Section: (A) Bump Flycuttingmentioning

confidence: 99%

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Diamond bit cutting for processing high topography wafers

Agarwal

Pham

Cotrin

et al. 2009

2009 11th Electronics Packaging Technology Conference

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“…A novel technique consists of high precision diamond cutting (milling) of the wafer to planarize the structures. [6] This technique also allows creating very flat Cu surfaces that can be used to bond die or wafers using Cu-Cu thermo-compression at lower temperatures, down to 250°C. Examples of such Cu-Cu thermo compression joints are shown in fig.…”

Section: Microbump Interconnect Technologymentioning

confidence: 99%

Through-silicon via and die stacking technologies for microsystems-integration

Beyne

Moor

Ruythooren

et al. 2008

2008 IEEE International Electron Devices Meeting

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“…First of all, some processing steps associated with solderbased interconnects are avoided (i.e., Under Bump Metallurgy (UBM) deposition, electroplating), which may lead to reduced cost and processing time. Moreover, uniformity (flatness) can be better achieved using the chemical mechanical polishing (CMP) process or by diamond bit planarization [6]. Finer interconnect density is possible, as well as better thermal performance due to copper's larger thermal conductivity.…”

Section: Introductionmentioning

confidence: 99%

Thermo-mechanical simulations of a copper-to-copper direct bonded 3D TSV chip package interaction test vehicle

Park

Ferrone

Cain

et al. 2013

2013 IEEE 63rd Electronic Components and Technology Conference

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Through-silicon via (TSV) technology has the potential to overcome existing limitations of miniaturization and to increase the performance of electronic devices. However, the interface between the solder and copper via has introduced some reliability issues. In contrast to conventional solderbased interconnects, Cu-Cu direct thermo-compression bonding (CuDB) presents an alternative to enable 3D package integration. Direct copper bonding has many advantages, including a reduction in soldering process steps, fine interconnect density, enhanced thermal conductivity, and less concern about intermetallic compounds (IMC) formation. To study the reliability of a device using direct copper bonding, a parametric study based on thermo-mechanical simulations is conducted to evaluate the design of a 3D test vehicle with direct copper bonding. Sub-modeling and lumped parameter methods are employed to account for the large differences in scale from the TSV level to the package level. Thermal simulations are performed for various package and heat source configurations using both finite element analysis and compact thermal models. Parameters of interest include TSV density, heater locations, power density and number of active layers. These thermal simulations yield global temperature distributions, as well as junction temperatures and the locations and magnitudes of hotspots. From the thermal modeling, temperature distributions and their corresponding temperature gradients are used in the mechanical analysis of the structures using finite element analysis for both linear and nonlinear constitutive behavior. The contact method is implemented to account for brittle layers of SiO 2 at the CuDB interfaces. Induced stress at the CuDB interfaces and warpage of the full model are analyzed with respect to the coefficient of thermal expansion (CTE) mismatch and applied thermal gradients. In addition, effects of design parameters such as die thickness, TSV pitch, and copper pad size are quantified with respect to the thermal performance and reliability of the package. IntroductionThree-dimensional (3D) packaging technology bonds semiconductor wafers and dies to produce multilevel chips. This technology has the potential to produce integrated circuits with a much better combination of cost, functionality, performance and power consumption. In addition, this approach to packaging provides a new path toward integrating diverse CMOS technologies, as well as CMOS chips with other emerging technologies in a more cost-effective manner. Associated with 3D package development is the incorporation of through silicon via (TSV) technology [1, 2], which offers many benefits for die interconnects and real estate utilization.

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Cu-Cu Bonding Alternative to Solder based Micro-Bumping

Cited by 23 publications

References 3 publications

Diamond bit cutting for processing high topography wafers

Diamond bit cutting for processing high topography wafers

Through-silicon via and die stacking technologies for microsystems-integration

Thermo-mechanical simulations of a copper-to-copper direct bonded 3D TSV chip package interaction test vehicle

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