CSP-Filling: A New X-Filling Technique to Reduce Capture and Shift Power in Test Applications

Abstract

In this paper, we present a new X-filling technique to reduce the shift and capture transitions occurred during scan based test application. The unspecified bits in the test cubes are filled with the logic value of 1's or 0's using the proposed don't care filling technique, namely CSP − f illing in such a way that the both average power and peak power in test applications are reduced. In our approach, the capture transition is made to be within the peak-power limit of the circuit under test while reducing the average power in shift-in phase of test applications. The experimental results obtained from ISCAS'89 benchmark circuits show that, the CSP − f illing technique provides a significant reduction in both shift and capture transitions in test mode.

A Comprehensive Review on Applications of Don’t Care Bit Filling Techniques for Test Power Reduction in Digital VLSI Systems

“…CSP Filling [19] begins with the application of the MTC-filling technique to fill the entire unspecified bits in the test cube. Capture-transitions of each pattern are computed after filling all X-bits with a logic value of '0' or '1'.…”

“…BA Fill signifies the bounded adjacent fill [16] and 4m filling scheme is described in [24]. X filling for capture and shift power reduction represented as CSP fill [19].…”

Low power and high fault coverage SIC reseeding TPG using x-filling techniques for Scan BIST

“…Fill techniques play a major role in power aware ATPG [3], The goal of X-filling algorithm is to minimize the Hamming distance between primary inputs and primary outputs, which can be implemented using zero fill and One fill techniques, In zero fills don't care are filled with logic zero and in one feel, don't care are filled with logic one. Different approaches have been proposed in selection of seed values, in [1] presents ABfilling algorithms are used to reduce capture power while feeding the first test patterns to the benchmark circuit, where in [3] focused on both shift power and capture power in test application using CSP filling techniques, Bhavsar proposed to don't care filling techniques for optimization of scan power and also focused on compression of data [2]. In [4] Lee proposed SIC based LFSR where the seed generator replaces with modified LFSR.…”