Crystallographic Orientation Effect on Electromigration in Ni-Sn Microbump

Huang, Yi-Chung; Chen, Chih‐Hao; Chakroborty, Subhendu; Wu, Albert T.

doi:10.1007/s11837-017-2457-9

Cited by 7 publications

(2 citation statements)

References 17 publications

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“…The morphology and grain sizes of Ni 3 Sn 4 are highly influenced by the Ni content in liquid Sn, as suggested by Wang et al [80]. Y.-T. Huang et al [81] used the line-type sandwich structure of Ni/Sn 3.5 Ag (15 µm)/Ni to simulate micro-bumps to examine the reliability of electromigration in 3D-IC technology. The results showed that the orientation of Sn and Ni 3 Sn 4 grains determines the IMC growth rate and affects the electromigration reliability of the solder and micro-bump joint.…”

Section: Micro-bump Electromigration and Heat Transfermentioning

confidence: 99%

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TSV Technology and High-Energy Heavy Ions Radiation Impact Review

Tian

Liu

2018

Electronics

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Three-dimensional integrated circuits (3D IC) based on TSV (Through Silicon Via) technology is the latest packaging technology with the smallest size and quality. As a result, it can effectively reduce parasitic effects, improve work efficiency, reduce the power consumption of the chip, and so on. TSV-based silicon interposers have been applied in the ground environment. In order to meet the miniaturization, high performance and low-cost requirements of aerospace equipment, the adapter substrate is a better choice. However, the transfer substrate, as an important part of 3D integrated circuits, may accumulate charge due to heavy ion irradiation and further reduce the performance of the entire chip package in harsh space radiation environment or cause it to fail completely. Little research has been carried out until now. This article summarizes the research methods and conclusions of the research on silicon interposers and TSV technology in recent years, as well as the influence of high-energy heavy ions on semiconductor devices. Based on this, a series of research methods to study the effect of high-energy heavy ions on TSV and silicon adapter plates is proposed.Electronics 2018, 7, 112 2 of 29 wafer was invented by M.G Smith et al. [2], which opposite surfaces were connected ohmically to the degenerately doped portions to be electrically connected along the thru-connection. With further research and exploration, 2.5D/3D integration technology with TSV realized integrated circuits with advantages of high interconnection density, high performance, low power consumption, and low cost [3,4]. In addition, the core is widely considered to be the leading technology in the field of high density packaging in the future and is an effective way to break through Moore's Law [5][6][7]. Figure 1. Silicon interposer through electrical copper coating technology production: (a) The construction of through-silicon via on the wafer; (b) The dry film etchant is stuck on the wafer, then exposed and etched; (c) Hole plating and pad fabrication by electroplating methods; (d) The photoresist removing. Adapted with permission from [27], Copyright Elsevier, 2016.

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Section: Micro-bump Electromigration and Heat Transfermentioning

confidence: 99%

“…The orientation affects the electromigration reliability. [81] Micro-bump Power one daisy chain of the micro-bumps.…”

Section: Designed a Test Interposer For Popmentioning

confidence: 99%