Cryogenic Qubit Integration for Quantum Computing

Das, Rabindra Nath; Yoder, Jonilyn; Rosenberg, Danna; Kim, David; Yost, D.; Mallek, Justin; Hover, David; Bolkhovsky, Vladimir; Kerman, Andrew J.; Oliver, William

doi:10.1109/ectc.2018.00080

Cited by 39 publications

(19 citation statements)

References 16 publications

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“…However, it still relies on wire bonds that are ultimately used to interface the four edges of the classical chip with the control network. Wire bonds are used even in the most recent proposal on qubit wiring and integration by MIT Lincoln Laboratory [23].…”

Section: Qubit Wiring: State Of the Art And Challenges Aheadmentioning

confidence: 99%

High-Density Qubit Wiring: Pin-Chip Bonding for Fully Vertical Interconnects

Mariantoni¹,

Bardysheva²

2018

Preprint

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Large-scale quantum computers with more than 10 5 qubits will likely be built within the next decade. Trapped ions, semiconductor devices, and superconducting qubits among other physical implementations are still confined in the realm of medium-scale quantum integration (∼ 100 qubits); however, they show promise toward large-scale quantum integration. Building large-scale quantum processing units will require truly scalable control and measurement classical coprocessors as well as suitable wiring methods. In this blue paper, we introduce a fully vertical interconnect that will make it possible to address ∼ 10 5 superconducting qubits fabricated on a single silicon or sapphire chip: Pin-chip bonding. This method permits signal transmission from DC to ∼ 10 GHz, both at room temperature and at cryogenic temperatures down to ∼ 10 mK. At temperatures below ∼ 1 K, the on-chip wiring contact resistance is close to zero and all signal lines are in the superconducting state. High-density wiring is achieved by means of a fully vertical interconnect that interfaces the qubit array with a network of rectangular coaxial ribbon cables. Pin-chip bonding is fully compatible with classical high-density test board applications as well as with other qubit implementations.

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Section: Qubit Wiring: State Of the Art And Challenges Aheadmentioning

confidence: 99%

High-Density Qubit Wiring: Pin-Chip Bonding for Fully Vertical Interconnects

Mariantoni¹,

Bardysheva²

2018

Preprint

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“…Integrating an increasing number of qubits without scarifying qubit performance, especially in monolithic quantum devices, requires overcoming several scientific and technical challenges, such as wiring problem [7][8][9], crosstalk [10][11][12], and fabrication yield [13,14]. To overcome these limitations, various schemes have been proposed and demonstrated, such as the compact integration of superconducting quantum devices with the classical cryogenic control systems [15][16][17][18][19], the three-dimensional (3D) integration technologies [20][21][22][23][24][25], and the post-processing of the fabricated qubit devices [26][27][28].…”

Section: Introductionmentioning

confidence: 99%

“…From a system integration perspective, building large quantum systems out of smaller modules may mitigate various challenges faced by monolithic integration strategy [17,[29][30][31][32]. As in modular quantum devices incorporating several modules, each module can be separately fabricated, characterized, and replaced.…”

Section: Introductionmentioning

confidence: 99%

“…Thus, the fabrication yield of the large modular system can be improved, and the electromagnetic crosstalk or impact of some correlated errors, such as caused by the high energy background radiation [33][34][35], may be restricted to the module scale. In addition, for modular quantum devices with larger inter-module spatial-separation dis-tance, the vacant space between modules could be employed to increase the control footprint area for qubit control, and could even be used to integrate on-chip control electronics [15,17,19,36]. This allows for a more-compact integration of the qubit device and its classical control system, thus potentially mitigating the wiring problem [7,8].…”

Section: Introductionmentioning

confidence: 99%

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Tunable coupling of widely separated superconducting qubits: A possible application towards a modular quantum device

Zhao,

Zhang,

Xue

et al. 2022

Preprint

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“…High qubit integration densities therefore require multilayer technologies, and 3D superconducting interconnects may suit the purpose (Fig. 1): they allow to get rid of interconnecting wires, freeing chip surface to increase qubit density, as well as to vertically stack and interconnect multiple chips [5].…”

Section: Introductionmentioning

confidence: 99%

Superconducting High-Aspect Ratio Through-Silicon Vias with DC-Sputtered Al for Quantum 3D integration

Alfaro-Barrantes

Mastrangeli

Thoen

et al. 2020

IEEE Electron Device Lett.

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This paper presents the fabrication and electrical characterization of superconducting high-aspect ratio through-silicon vias DC-sputtered with aluminum. Fully conformal and void-free coating of 300 μm-deep and 50 μm-wide vias with Al, a CMOS-compatible and widely available superconductor, was made possible by tailoring a funneled sidewall profile for the axisymmetric vias. Single-via electric resistance as low as 80.44 m at room temperature and superconductivity below 1.28 K were measured by a cross-bridge Kelvin resistor structure. This work thus demonstrates the fabrication of functional superconducting interposer layers, suitable for high-density 3D integration of silicon-based quantum computing architectures.

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Cryogenic Qubit Integration for Quantum Computing

Cited by 39 publications

References 16 publications

High-Density Qubit Wiring: Pin-Chip Bonding for Fully Vertical Interconnects

High-Density Qubit Wiring: Pin-Chip Bonding for Fully Vertical Interconnects

Tunable coupling of widely separated superconducting qubits: A possible application towards a modular quantum device

Superconducting High-Aspect Ratio Through-Silicon Vias with DC-Sputtered Al for Quantum 3D integration

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