Crack Propagation and Mechanical Fracture in GaAs-on-Si

Abstract

This paper describes the study of crack propagation and mechanical fracture in GaAs-on-Si, which are closely related with the residual stress. The crack propagation is often observed as the GaAs thickness exceeds about 3 µm, and the upper limit of the number of cracks increases linearly as the GaAs thickness increases. The cracks propagate from the surface defects, where stress ten times larger than the original residual thermal stress in GaAs-on-Si exists. The mechanical fracture strength (ζ) of the GaAs-on-Si wafer decreases as the GaAs thickness increases, and becomes equal to that of the bulk GaAs at the thickness of about 3 µm due to the concentrated stress near the cracks. The back coating of SiO2 is effective for stress relaxation, and the preliminary result of about 3×108 dyn/cm2 of stress relaxation is obtained.

Heteroepitaxial Growth of III-V Semiconductors on Silicon

“…For the GaAs-on-Si, thermal cracks begin to propagate if the thickness of GaAs exceeds about 3 µm, and the number of cracks increases as the thickness increases [89]. As shown in Figure 2a, the cracks appear predominantly in only one of <110> direction when the thickness of GaAs is close to the critical thickness for crack formation.…”

“…The Griffith criterion describes the condition for crack propagation, rather than for crack formation, under pre-existing cracks. Nonetheless, because the presence of any imperfections in the epitaxial layer also affects the crack formation [89], the thickness at which the crack forms may be close to the Griffith thickness h G [88]. A wide variety of theoretical models which describe the condition for crack formation can be found elsewhere [90,91].…”

“…In addition, as the crack nucleation originates from other pre-existing defects, the presence of any imperfections in the epitaxial layer also affects the crack formation [89]. Like other defects, the presence of thermal cracks introduces destructive effects on the quality of III-V epilayer and performance of optoelectronic devices, such as light scattering centers, electrical leakage path, and limitation on the total thickness of epilayer [98].…”

Сравнение гетероструктур А-=SUP=-III-=/SUP=-В-=SUP=-V-=/SUP=-, выращенных на платформах Ge/Si, Ge/SOI и GaAs

“…Скрытый слой SiO 2 в подложке SOI образца В ввиду аморфной структуры и меньшего значения коэффициента термического расширения (КТР) (0.5 • 10 −6• С −1 [13]) в сравнении с Si, Ge, GaAs (примерные значения КТР для объемных материалов GaAs, Ge и Si составляют 5.9 • 10 −6 , 5.8 • 10 −6 и 2.6 • 10 −6• С −1 соответственно [14]) мог скомпенсировать часть термоупругих деформаций, возникших из-за разницы КТР слоев GaAs/Ge и Si при остывании после ростовых процессов. Например, в работе [13] аппроксимировали функцией ω(ϕ) = ω 0 + δ cos(ϕ − η), где δ -угол между нормалью к поверхности держателя и направлением (001) слоя или подложки, η -азимут направления (001) слоя или подложки, ω 0 -нуль функции cos(ϕ − η). Результатом аппроксимации были углы (ω 0 , δ, η) для слоя и подложки.…”

GaAs on Si substrate with dislocation filter layers for wafer‐scale integration

“…In this study, we systematically investigate GaAs on Si wafers by analyzing the bowing and crystal quality. Unlike other results of GaAs on Si where bowing depended on the thickness of the GaAs layer on the Si substrate [20,21] and composition of the InGaP layer [22], the thickness of the GaAs layer, herein, was fixed to 1.5 μm, and that of the Si substrate was varied from 270 μm to 750 μm. The optimum thickness of the Si wafer produces less bowing of GaAs on Si using both the experimental and calculation results.…”