CPU Accounting in CMP Processors

Luque, Carlos Julio; Moretó, Miquel; Cazorla, Francisco J.; Gioiosa, Roberto; Buyuktosunoglu, Alper; Valero, Mateo

doi:10.1109/l-ca.2009.3

Cited by 12 publications

(7 citation statements)

References 10 publications

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“…Eyerman and Eeckhout [16] propose probabilistic job symbiosis model that enhances the SOS scheduler. Based on the cycle accounting architecture [15], [26], [27], the model estimates the single-threaded progress for each job in a multithreaded workload. Other approaches [12], [17], [21], [33] propose techniques to construct workloads of threads that exhibit good symbiosis in shared caches solving problems of cache contention.…”

Section: Related Workmentioning

confidence: 99%

Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors

Radojković

Cakarevic

Verdú

et al. 2013

IEEE Trans. Parallel Distrib. Syst.

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The introduction of multithreaded processors comprised of a large number of cores with many shared resources makes thread scheduling, and in particular optimal assignment of running threads to processor hardware contexts to become one of the most promising ways to improve the system performance. However, finding optimal thread assignments for workloads running in state-ofthe-art multicore/multithreaded processors is an NP-complete problem. In this paper, we propose BlackBox scheduler, a systematic method for thread assignment of multithreaded network applications running on multicore/multithreaded processors. The method requires minimum information about the target processor architecture and no data about the hardware requirements of the applications under study. The proposed method is evaluated with an industrial case study for a set of multithreaded network applications running on the UltraSPARC T2 processor. In most of the experiments, the proposed thread assignment method detected the best actual thread assignment in the evaluation sample. The method improved the system performance from 5 to 48 percent with respect to load balancing algorithms used in state-of-the-art OSs, and up to 60 percent with respect to a naive thread assignment.

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Section: Related Workmentioning

confidence: 99%

Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors

Radojković

Cakarevic

Verdú

et al. 2013

IEEE Trans. Parallel Distrib. Syst.

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“…Eyerman and Eeck hout [8] and Cazorla et al [3] propose mechanisms to determine an application's slowdown while it is running alongside other applications on an SMT processor. Luque et al [23] estimate application slowdowns in the presence of shared cache interfer ence. These studies do not take into account inter-application interference at the main memory.…”

Section: Related Workmentioning

confidence: 99%

MISE: Providing performance predictability and improving fairness in shared main memory systems

Subramanian

Seshadri

Kim

et al. 2013

2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)

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Applications running concurrently on a multicore system in terfere with each other at the main memory. This interference can slow down diff erent applications diff erently. Accurately es timating the slowdown of each application in such a system can enable mechanisms that can enforce quality-of-service. While much prior work has focused on mitigating the performance degradation due to inter-application interference, there is lit tle work on estimating slowdown of individual applications in a multi-programmed environment. Dur goal in th is work is to build such an estimation scheme.To this end, we present our simple Memory-Interference induced Slowdown Estimation (MISE) model that estimates slowdowns caused by memory interference. We build our model based on two observations. First, the performance of a memory bound application is roughly proportional to the rate at which its memory requests are served, suggesting that request-service rate can be used as a proxy for performance. Second, when an application's requests are prioritized over all other applica tions' requests, the application experiences very little interfer ence from other applications. This provides a means for esti mating the uninterfered request-service-rate of an application while it is run alongside other applications. Using the above observations, our model estimates the slowdown of an applica tion as the ra tio of its uninterfered and interfered request service rates. We propose simple changes to the above model to estimate the slowdown of non-memory-bound applications.We demonstrate the effectiveness of our model by develop ing two new memory scheduling schemes: 1) one that provides soft quality-of-service guarantees and 2) another that explicitly attempts to minimize maximum slowdown (i.e., unfairness) in the system. Evaluations show that our techniques perform sig nificantly better than state-of-the-art memory scheduling ap proaches to address the above problems.

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“…The concept of Energy Accounting is inherited from CPU accounting that was first introduced in [11] and then develop for multicores in [10], [12] and for SMTs in [7]. CPU accounting measures the CPU utilization of a given task during a period of time when it runs in a multicore processor.…”

Section: Per-task Energy Accountingmentioning

confidence: 99%

“…We aim at maintaining the same Principle of Accounting that rules when measuring CPU accounting [11]: the energy accounted to a task should be independent from the workload in which this task runs.…”

Section: Per-task Energy Accountingmentioning

confidence: 99%

Per-task Energy Accounting in Computing Systems

Liu

Jiménez

Moretó

et al. 2014

IEEE Comput. Arch. Lett.

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Abstract-We present for the first time the concept of per-task energy accounting (PTEA) and relate it to per-task energy metering (PTEM). We show the benefits of supporting both in future computing systems. Using the shared last-level cache (LLC) as an example: (1) We illustrate the complexities in providing PTEM and PTEA; (2) we present an idealized PTEM model and an accurate and low-cost implementation of it; and (3) we introduce a hardware mechanism to provide accurate PTEA in the cache.

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CPU Accounting in CMP Processors

Cited by 12 publications

References 10 publications

Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors

Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors

MISE: Providing performance predictability and improving fairness in shared main memory systems

Per-task Energy Accounting in Computing Systems

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