Countermeasures for timing-based side-channel attacks against shared, modern computing hardware

Abstract

There are several vulnerabilities in computing systems hardware that can be exploited by attackers to carry out devastating Microarchitectural Timing-Based Side-Channel Attacks against these systems and as a result compromise the security of the users of such systems. By exploiting Microarchitectural resources, adversaries can potentially launch different variants of Timing Attacks, for instance, to leak sensitive information through timing. In view of these security threats against computing hardware, in a recent study, titled "Are Timing-Based Side-Channel Attacks Feasible in Shared, Modern Computing Hardware?", currently undergoing the review process, we presented and analysed several such attacks. This extended study proceeds to build upon our recent study in question. To this end, we analyse the existing countermeasures against Timing Attacks and propose new strategies in dealing with such attacks.

Network and Hypervisor-Based Attacks in Cloud Computing Environments

“…To address this limitation, a virtualisation hypervisor mediates access between guest OSs and the physical compute resources. However, hypervisors, themselves, have displayed signs of vulnerabilities that have enabled the guest OSs to gain inappropriate levels of co n tro l or influence on the underlying platform (Alliance, Coud Sercurity, 2010;M o n tasari, et al, 2018b;Montasari, et al, 2019a;Montasari, et al, 2019e;Montasari, et al, 2019f;Montasari, et al, 2019g). The following sub sections describe various scenarios in which flaws in hypervisors can be exploited to perpetrate cyber-attacks in CCEs.…”