Proceedings.International Conference on Parallel Architectures and Compilation Techniques
DOI: 10.1109/pact.2002.1106021
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Cost effective memory dependence prediction using speculation levels and color sets

Abstract: Memory dependence prediction allows out-of-order is

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Cited by 5 publications
(10 citation statements)
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“…According to Onder's proposed classification [12], dependence predictors are typically independence predictors that predict zero matches very well, pair predictors that are tuned for predicting exactly one matching store, and set predictors that aim to capture more intricate load/store patterns. Counting Dependence Predictors are a hybrid that can switch between these classes of predictors depending on the program workload.…”
Section: Related Work In Dependence Predictionmentioning
confidence: 99%
“…According to Onder's proposed classification [12], dependence predictors are typically independence predictors that predict zero matches very well, pair predictors that are tuned for predicting exactly one matching store, and set predictors that aim to capture more intricate load/store patterns. Counting Dependence Predictors are a hybrid that can switch between these classes of predictors depending on the program workload.…”
Section: Related Work In Dependence Predictionmentioning
confidence: 99%
“…Yoaz et al [26] present a dynamic store distance based technique that uses less space than store set, but does not perform as well.Önder and Gupta [19] have shown that the restriction of issuing store instructions in-order can be removed and store instructions can be allowed to execute out-of-order if the memory order violation detection mechanism is modified appropriately. Furthermore, they have shown that memory order violation detection can be based on values, instead of addresses.Önder [17] has proposed a light-weight memory dependence predictor which uses multiple speculation levels in the hardware to direct load speculation. This scheme outperforms store set algorithm when predictor space is small.…”
Section: Memory Disambiguationmentioning
confidence: 99%
“…To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. ware techniques to disambiguate memory references to improve performance [5,10,11,15,16,17]. While many hardware techniques achieve good performance, most require a large on-chip memory to record memory dependences.…”
Section: Introductionmentioning
confidence: 99%
“…Chrysos and Emer [3] introduce the store set concept which allows using direct mapped structures without explicitly aiming to identify the load/store pairs precisely.Önder [15] has proposed a light-weight memory dependence predictor which uses multiple speculation levels in the hardware to direct load speculation. Onder and Gupta [17] have shown that the restriction of issuing store instructions in-order can be removed and store instructions can be allowed to execute out-of-order if the memory order violation detection mechanism is modified appropriately.…”
Section: Related Workmentioning
confidence: 99%
“…On the other hand, profiling-based techniques typically cannot adapt to program input changes. Similarly, numerous hardware techniques exist for determining when a load may be speculatively issued prior to the completion of a preceding store in order to improve superscalar performance [3,14,15], but compiler-based solutions typically do not yield good results across a wide spectrum of benchmarks.…”
Section: Introductionmentioning
confidence: 99%